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ADG5423 external resistors selection


I'm thinking of building up the circuit shown bellow and will appreciate your opinion on the usage of the ADG5423.

The purpose of the circuit is to close the contacts of an opto-coupler (AQV252GAX) upon appearance of voltage at the trigger input (connected to R1).

The problem is that the trigger voltage source is very sensitive. So:

1. The load that the trigger source "sees" should be large (hundreds of Kohm).

2. This load must be disconnected after the trigger operation (i.e. a latching trigger).

The circuit should operate as follows:

Once voltage is applied to the trigger input, the trigger current flows through the NC (S2,D2) contacts and generates a voltage drop on R2 which is connected to IN1. IN1 in now at logic '1' and closes the NO contacts (S1,D1). This causes current to flow through the photo-diode (closing the opto-coupler contacts) and generates a logic '1' at IN2 and IN1. This causes the NC contacts to open (thus disconnecting the trigger source from the circuit) and keeps the NO contacts closed (thus forming the required latching operation).

My main concern is with the values of resistors R1&R2. If they are too small, I will overload my trigger voltage source. If they are too big, the transistors might not switch into conduction. Since the datasheet doesn't provide information regarding the internal transistors, I am not sure of the values that I should choose for R1 and R2.

Will the ADG5423 work as expected with R1=R2=400K?

Thank you in advance,


  • Hello Alex,

    I don't understand your query on the internal transistors? Once the voltage on the input, INx, reaches the required level, the switches will be turned on/off. There is a maximum amount of current that can be pushed through the switch, but I don't think you are anywhere near those limits.

    You have not specified what your trigger voltage level will be. Working through your schematic, I suggest that the trigger voltage should be at least 4V to achieve the VINH requirement of the digital inputs.

    I have assumed a trigger voltage source of 5V and 0V. Before the trigger voltage is applied, the 0V keeps switch 1 off and switch 2 on.

    When 5V is applied, the resulting voltage at IN1 = 2.5V (assuming R1 = R2 = 400kOhm). This turns on switch 1 and allows the 12V to generate ~5V at the both INx and the Optocoupler.

    If my analysis is correct, then I don't think there will be an issue with R1 = R2 = 400kOhm, and I think you could go higher if you wanted to reduce the current flow. R2 is in parrallel with R4, so you should ensure that the required voltages and currents for the optocoupler are reached.



  • Hello Sean,

    Thanks for the response.

    Your estimation of the trigger voltage was correct, it is around 5V.

    Perhaps my concern about the resistor values rises from misunderstanding of the device operation, but I assume that the NC operation if formed by a PMOS with an 0V gate voltage. In the configuration shown in the schematic the source voltage of the PMOS will be ~2.5V, which means Vsg = 2.5V. Now, if the threshold voltage of the internal PMOS is lower than -2.5V then the PMOS will be in cut-off. Since the datasheet doesn't provide information regarding the internal transistors I can not be sure of the resistor values. 

    Basically, what I'm asking is whether the device guarantees correct operation regardless of the Source/Drain/Gate voltages (as long as they are in spec of course) or should I worry about the various transistor voltages?

    Thanks again,


  • Hello Alex,

    The digital inputs control internal voltages but are not directly gate voltages. The difference between the NC and NO switches is that one is Normally Closed with a High and the other is Normally Open. The gate voltages are internally controlled.

    The switch is guaranteed to be on/off with the appropriate digital control.