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ADG417 Production
The ADG417 is a monolithic CMOS SPST switch. This switch is designed on an enhanced LC2MOS process that provides low power dissipation yet gives high switching...
Datasheet
ADG417 on Analog.com

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ADG417 VL threshold

		
	
				

			

									
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  •  Analog Employees  

			
			
			    	
			                    
                
				                on Jan 26, 2015 
				
			
			
		

		
		                    	    

        	    
Thread Summary

                The user asked for clarification on the logic input thresholds (VIH and VIL) for the ADG417 when VL is set to +VDD (e.g., +15V or +24V). The final answer provided a figure from an attached document showing the applicable thresholds for the ADG417, indicating that the thresholds vary with VL voltage. The user confirmed understanding the supply pin for logic but sought specific threshold levels for higher VL values, which were addressed in the provided figure.
                        	    

                
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Hello,

 
I'd like to clarify the threshold level of VL.  Since the data sheet says only at VL=5V, I'd like to know what the VL thresholds would be in case of VL=+VDD (ex. VL=+15V or +24V).  I think the VIH shouldn't be 2.4V at VL=+24V.

 
Could you tell me what the thresholds of VIL and VIH at VL=+VDD (greater than +5V) is ?

 
Thank you,

 
Regards,

 
Hiroshi

			

			
									
		                             
                        

    

                                            
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