ADN4605 channel status registers

I am able to access ADN4605 device and can access all the registers. But all the channel registers are showing 0x3F. I did not understand this issue? Is it software or Hardware issue?

i2c write at address 0x0 data 0x1

i2c write at address 0x0 data 0x0

i2c read at address 0x1d

channel 25 map 0 status should be 0x19 = 0x19

i2c write at address 0x2 data 0x0

i2c write at address 0xba data 0x0

i2c read at address 0x2

map select reg =0x0

i2c read at address 0xb0

tx enable reg before programming =0

i2c read at address 0xb0

i2c write at address 0xb0 data 0x3

i2c read at address 0xb0

i2c write at address 0xb0 data 0xf

i2c read at address 0xb0

i2c write at address 0xb0 data 0x3f

i2c read at address 0xb0

i2c write at address 0xb0 data 0xff

i2c read at address 0xb0

tx enable reg =0xff

i2c write at address 0x4 data 0x25

i2c write at address 0x5 data 0x24

i2c write at address 0x6 data 0x26

i2c write at address 0x7 data 0x23

i2c read at address 0x4

output channel 0 status =0x25

i2c read at address 0x5

output channel 1 status =0x24

i2c read at address 0x6

output channel 2 status =0x26

i2c read at address 0x7

output channel 3 status =0x23

i2c read at address 0xbc

i2c write at address 0xbc data 0x0

i2c read at address 0xbc

i2c write at address 0xbc data 0x0

i2c read at address 0xbc

i2c write at address 0xbc data 0x0

i2c read at address 0xbc

i2c write at address 0xbc data 0x0

i2c read at address 0xd1

i2c write at address 0xd1 data 0x0

i2c read at address 0xd1

i2c write at address 0xd1 data 0x0

i2c read at address 0xd1

i2c write at address 0xd1 data 0x0

i2c read at address 0xd1

i2c write at address 0xd1 data 0x0

i2c read at address 0xc8

i2c write at address 0xc8 data 0x40

i2c read at address 0xc9

i2c write at address 0xc9 data 0x1

i2c read at address 0xc9

i2c write at address 0xc9 data 0x5

i2c read at address 0xc9

i2c write at address 0xc9 data 0x15

i2c write at address 0x1 data 0x1

i2c read at address 0x1

adn update status =0x0

i2c read at address 0x54

channel 0 status 0x3f

i2c read at address 0x55

channel 1 status 0x3f

i2c read at address 0x56

channel 2 status 0x3f

i2c read at address 0x57

channel 3 status 0x3f

i2c read at address 0x58

channel 4 status 0x3f

i2c read at address 0x59

channel 5 status 0x3f

i2c read at address 0x5a

channel 6 status 0x3f

i2c read at address 0x5b

channel 7 status 0x3f

i2c read at address 0x5c

channel 8 status 0x3f

i2c read at address 0x5d

channel 9 status 0x3f

i2c read at address 0x5e

channel 10 status 0x3f

i2c read at address 0x5f

channel 11 status 0x3f

i2c read at address 0x60

channel 12 status 0x3f

i2c read at address 0x61

channel 13 status 0x3f

i2c read at address 0x62

channel 14 status 0x3f

i2c read at address 0x63

channel 15 status 0x3f

i2c read at address 0x64

channel 16 status 0x3f

i2c read at address 0x65

channel 17 status 0x3f

i2c read at address 0x66

channel 18 status 0x3f

i2c read at address 0x67

channel 19 status 0x3f

i2c read at address 0x68

channel 20 status 0x3f

i2c read at address 0x69

channel 21 status 0x3f

i2c read at address 0x6a

channel 22 status 0x3f

i2c read at address 0x6b

channel 23 status 0x3f

i2c read at address 0x6c

channel 24 status 0x3f

i2c read at address 0x6d

channel 25 status 0x3f

i2c read at address 0x6e

channel 26 status 0x3f

i2c read at address 0x6f

channel 27 status 0x3f

i2c read at address 0x70

channel 28 status 0x3f

i2c read at address 0x71

channel 29 status 0x3f

i2c read at address 0x72

channel 30 status 0x3f

i2c read at address 0x73

channel 31 status 0x3f

i2c read at address 0x74

channel 32 status 0x3f

i2c read at address 0x75

channel 33 status 0x3f

i2c read at address 0x76

channel 34 status 0x3f

i2c read at address 0x77

channel 35 status 0x3f

i2c read at address 0x78

channel 36 status 0x3f

i2c read at address 0x79

channel 37 status 0x3f

i2c read at address 0x7a

channel 38 status 0x3f

i2c read at address 0x7b

channel 39 status 0x3f

Attached is the schematics.

with regards

Dhananjay

vcgsm.pdf
  • 0
    •  Analog Employees 
    on Jan 7, 2016 2:28 AM

    Hi Dhananjay,

    I believe this may be a hardware issue. The software writes/reads look correct and the fact that you are able to read the correct values in some of the registers indicates that you are properly communicating to the device. I noticed on the schematic that the CSB pin is left floating. This pin gates the update so this needs to be pulled low in order for the XPT update to take effect. Please give this a try. I believe this should correct your problem.

    Regards,

    Jarrod

  • Hi Jarrod

    As per your suggestion, I pulled down chip select (CSB) as well as update pin. Still I see 0x3F in channel status registers.

      Please help me to debug this.

    with regards

    Dhananjay

  • Hi Dhananjay,

    have you solved the issue?

    I'm facing to similar one. Time to time I've seen wrong behavior, the writes go to the wrong register or read returns values from different or nonsense. I must admit it might be caused by problematic layout of the i2c bus on the PCB. Anyway it seems the switch (according to the scope) might responds with wrong values.

    Regards,

    Petr

  • 0
    •  Analog Employees 
    on Mar 18, 2016 6:27 AM

    Hi,

    Apologies, I lost visibility to this thread as it was presumed to be answered correctly. With regards to intermittent behavior, can you please provide a scope shot of the I2C Data and Clock Lines? Have you verified that that register address and data on the scope are the same  as in software? Also, can you verify the logic levels of the I2C signals along with the DVCC supply voltage level? The ADN4605 will not internally write data to the wrong registers unless the data has been corrupted. This can be due to noise on the power supply (DVCC), improper power supply level, or incorrect control logic level. Other impairments can play a role as well, such as XTALK on the I2C bus. If you would like to share your schematic, I will be happy to review it.

    Regards,

    Jarrod