Impedance of an Un-energized SPST

Question

What is the impedance of SPST switch like ADG801 when it is un-energized (no supply to VDD)? 
 I downloaded the SPICE model and tried to measure the SPST impedance with VDD = 0V. 
 I provided a 1V supply to the "D" and connect "S" to the ground, and I measured a 161.5mohm of impedance. 
 Isn't a normally-open (NO) SPST will be in open or high impedance state when un-energized?

mayp · Accepted Answer

Hi Chunlee, 
 Looking at your application, I would suggest to use a fault protected switch. These switches are guaranteed off and don't get damaged even when there are analog signals present at the inputs before power is applied. 
 We do have ADG4612 which is a power off protector quad SPST switch. It operates from +/-3V to +/-5V dual supply and 3V to 12V single supply. It has low on resistance of 5.2 ohms. This is recommended for applications when no power supplies are present, the switch remains in the off condition, and the switch inputs are high impedance inputs, ensuring that no current flows, which can damage the switch. 
 Hope this helps. Let me know if you have other concerns. 
 Best Regards, 
 May

mayp · Answer

Hi, Chunlee. 
 When VDD=0V, the switch is turned off and is at high impedance state. However, there are protection diodes to the supplies available at the source, drain and logic control pin. These protection diodes are reverse-biased in normal operation and do not pass current unless the signal exceeds the supply voltage. The figure below illustrates the standard analog switch circuitry. 
 
 In your case, when VDD=0V and there is 1V available at the drain pin, the protection diode goes forward-biased. This forward biased protection diode, I think is what causes the 161.5 mohm of impedance you are measuring which can be confirmed looking at the ADG801 spice model on line 34, .MODEL DX D(IS=1E-12 N=0.5 RS=0.1) where Rs refers to the parasitic resistance (series resistance) parameter of the diode used. 
 May I know what application will the ADG801 be used? Why would there be voltage available at the source or drain pin if the switch is turned off? Please be reminded that it is not advisable to have an input voltage available at the source, drain or logic control pin while the ADG801 is not yet powered up. This will only stress the ADG801 and may cause permanent damage to the device. 
 Let me know if this helps or if you have other concerns. 
 Best Regards, 
 May

mayp · Answer

Hi Chunlee, 
 The ADG4612 has the lowest Ron for our fault-protected parts for single supply operation application like yours. 
 However, if you still wish to use ADG801, then there are possible solution you might want to consider in your design: 
 
 Is there any way you can tie up the Vdd of the ADG801 to a stable 5V supply? This might be tied up to the same line where the supply pin of the "main switch" is connected. This will ensure that the ADG801 is always powered up. 
 For the control signal line, you might want to place a pull-down resistor in between the control signal and the IN pin of the ADG801. Please see figure below. This will secure the state of the IN pin even if the control signal chain is in power-down. So at 0V control logic, the ADG801 is in an open state.

Using these possible solutions, you would not need to consider an over voltage event. 
 Let me know if this helps. 
 Best Regards, 
 May

mayp · Answer

Hi Chunlee, 
 Just to clarify things, cutting off the power of the ADG801 while there is an available signal at the S pin is not recommended and may cause damage to the device. I would suggest to tie it to a stable 5V line as you have confirmed above. 
 Going back to your previous statement, 
 " However, there is a special scenario where I will shut down the circuitry which generate the control signal. Thus, I am thinking to cut the VDD to ADG801 to make sure ADG801 will stay Hi-Z (not to interfere with the main path)." 
 Does this mean you are trying to power-down the control circuitry (decoder) so as to have an output combination of 0000? If this is the case, then adding a pull-down resistor would solve the problem. You see, at power-down mode of the decoder, the pull-down resistor would ensure that the logic state of the IN pin of the ADG801 is at 0V since it is grounded. Therefore the ADG801 is in an open state. 
 Let me know your thoughts. 
 Best Regards, 
 May

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Impedance of an Un-energized SPST

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