My customer has a offset drift problem on the Drain Output pin of ADG1206.(Please refer to attached circuit diagram)
When VDD = 12V, GND = 0V, EPAD = VSS = -3V are supplied on each of ADG1206, Normal operation is confirmed.
However if VDD = 12V, GND = 0V, VSS=EPAD=0V are supplied, Offset value is irregularly generated in D output of MUX0 and MUX2. And about -0.5V are observed at the MUX1 output regardless of MUX setting.
What I ask is why the offset happen on the mux output depending on VSS supply voltage? The difference between dual supply and single supply for On Resistance and Leakage current are not so big in datasheet. Is there other reason on this problem?