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ADG836L latching up, possible static problem?

Hi all, 

I have a design using the ADG836L mux.  The inputs to the mux are connected to a pogo pin assembly that is used in a production environment to program microcontrollers.  I am using these multplexor/switches to rout the signals to the device programmer.  I am experiencing an issue where the first ADG836L in the chain gets in to a latched condition and starts drawing excessive current.  Cycling power temporarily fixes the problem until it happens again.  

My initial thought is that there is a static charge built up on the surface that the pogo assembly contacts and that this is causing this fault.  I was hoping someone might be able to provide some clarification as to what might be causing this problem and how I might go about preventing it.  

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  • Hi Valued User,

    Can you send a scope shot when "fault" condition occurs with probes to Vdd, INx, Sx, and Dx of the ADG836L so we can trace what is happening in the device?

    What is your power-up sequence?

    For the line "Vdd starts to oscillate due to the excessive current draw (ADP124 regulator)."

    - Is there other components/circuit block where Vdd is connected to besides ADG836L?

    What do you mean by DUT? Is it a single device under test? Or is there a mini circuit board were a device under test is in it and then will be connected to the pogo pin where the ADG836L is connected to? Please clarify.

    Also, "the Sx pins are essentially connected to the high impedance voltage sense line of an RPM systems MPQ programmer.  D1 and D2 are connected to a pogo pin assembly that contacts powered circuits (3V nominal battery supply)". and at the same time "The fault occurs when the pogo pins contact the DUT circuit substrate."

    -Can you please elaborate more?

    You mentioned that you can't provide a schematic at this time, may I know when do you think you can provide a schematic? Schematics are essential information when debugging a problem. With schematic on hand, we can analyze the circuit behavior and detect where the problem is coming from. Since the schematic is not yet available, can you at least share a simple block diagram of your test circuit?

    Best Regards,

    May

     

     

Reply
  • Hi Valued User,

    Can you send a scope shot when "fault" condition occurs with probes to Vdd, INx, Sx, and Dx of the ADG836L so we can trace what is happening in the device?

    What is your power-up sequence?

    For the line "Vdd starts to oscillate due to the excessive current draw (ADP124 regulator)."

    - Is there other components/circuit block where Vdd is connected to besides ADG836L?

    What do you mean by DUT? Is it a single device under test? Or is there a mini circuit board were a device under test is in it and then will be connected to the pogo pin where the ADG836L is connected to? Please clarify.

    Also, "the Sx pins are essentially connected to the high impedance voltage sense line of an RPM systems MPQ programmer.  D1 and D2 are connected to a pogo pin assembly that contacts powered circuits (3V nominal battery supply)". and at the same time "The fault occurs when the pogo pins contact the DUT circuit substrate."

    -Can you please elaborate more?

    You mentioned that you can't provide a schematic at this time, may I know when do you think you can provide a schematic? Schematics are essential information when debugging a problem. With schematic on hand, we can analyze the circuit behavior and detect where the problem is coming from. Since the schematic is not yet available, can you at least share a simple block diagram of your test circuit?

    Best Regards,

    May

     

     

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