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ADG836L latching up, possible static problem?

Hi all, 

I have a design using the ADG836L mux.  The inputs to the mux are connected to a pogo pin assembly that is used in a production environment to program microcontrollers.  I am using these multplexor/switches to rout the signals to the device programmer.  I am experiencing an issue where the first ADG836L in the chain gets in to a latched condition and starts drawing excessive current.  Cycling power temporarily fixes the problem until it happens again.  

My initial thought is that there is a static charge built up on the surface that the pogo assembly contacts and that this is causing this fault.  I was hoping someone might be able to provide some clarification as to what might be causing this problem and how I might go about preventing it.  

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  • Hi Valued User,

    You mentioned a "the first ADG836L in the chain", how many ADG836L is in "chain" mode?  Is it possible to share your schematic so I may understand the circuit better? Also, I would need the following details to confirm your set-up:

    • What is Vdd level? By drawing excessive current, do you mean Idd?
    • Is Vdd stable? I'm asking this because if Vdd is not stable and there are times that it is not reaching it's required level, ESD diodes are being forwards biased are causing excessive current as you may say.
    • What are the INx levels? How fast do you toggle the INx pin?
    • What is you analog input signal at Sx/D? How much current is passing through the switch?
    • What is your power-up sequence?

    A scope shot would be a great help to trace where the problem is coming from. You may place the probes to Vdd, INx, Sx, and Dx of the ADG836L so we can trace what is happening and when does it drawing excessive current.

    Also, may I know how did you realize that it is a latch-up condition?

    Best Regards,

    May

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  • Hi Valued User,

    You mentioned a "the first ADG836L in the chain", how many ADG836L is in "chain" mode?  Is it possible to share your schematic so I may understand the circuit better? Also, I would need the following details to confirm your set-up:

    • What is Vdd level? By drawing excessive current, do you mean Idd?
    • Is Vdd stable? I'm asking this because if Vdd is not stable and there are times that it is not reaching it's required level, ESD diodes are being forwards biased are causing excessive current as you may say.
    • What are the INx levels? How fast do you toggle the INx pin?
    • What is you analog input signal at Sx/D? How much current is passing through the switch?
    • What is your power-up sequence?

    A scope shot would be a great help to trace where the problem is coming from. You may place the probes to Vdd, INx, Sx, and Dx of the ADG836L so we can trace what is happening and when does it drawing excessive current.

    Also, may I know how did you realize that it is a latch-up condition?

    Best Regards,

    May

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