When using the MAX14661 in SPI mode, the datasheet says under "SPI Interface" that the switches are updated at the rising edge of CS after writing 32 bits to the 4 direct registers. But it is not clear how long it takes for the update occur.
Figure 2 shows it to be the sum of tOFF and tBBM and lists tOFF typical of 5us and tBBM min of 0. But it does not say what the maximum of either one is.
Figure 2 also shows the update time as equal to tON which has typical 13us and max 25us.
It is not clear if the maximum update time is 5us or 25us.