ADGM1304 SPI Read/Write Bit seems to be wrongly documented.
Datasheet suggest an active low write bit, so write Address should be 0x20 (0b0010'0000) and read address 0x50 (1010'0000).
However we got it working with it being flipped, which took a long time of investigation and trial and error.
The picture depicts a not successful write. Our SPI MOSI lines defaults to High.
Hi ArnoldW,
Thanks for reaching out. I'd like to understand the plot you attached above. Are you trying to write 0x2004, effectively turning on RF3? After that 16 bit write, you should see RF3 turn on. If you want to read back the state of the switches, write 0xA0. The last 8 bits are actually ignored during a read command during which SDO propagates out the data contained in the addressed register (0x20).
I did notice that your SCLK has some jitter on the last 8 bits. Not sure what maybe causing that.
regards, Francis
Hi ArnoldW,
Thanks for reaching out. I'd like to understand the plot you attached above. Are you trying to write 0x2004, effectively turning on RF3? After that 16 bit write, you should see RF3 turn on. If you want to read back the state of the switches, write 0xA0. The last 8 bits are actually ignored during a read command during which SDO propagates out the data contained in the addressed register (0x20).
I did notice that your SCLK has some jitter on the last 8 bits. Not sure what maybe causing that.
regards, Francis
