Hi all,
I designed a board with the ADG704 to sample for 4 channels with a single ad7940 ADC. Between the adg704 and the ad7940 I have a voltage buffer opamp.
I am facing the following issue which I do not clearly understand and I would like to know your opinion. The ad7940 has the SCK running at 2.3 MHz. The EN pin of the ADG704 is always high.
At first I wrote a microcontroller code to do these operations described in the pseudo-code here below:
1a) select the ADG704 ch1 through A0,A1 inputs
1b) AD7940 CS/ goes low
1c) AD7940 start sampling
1d) AD7940 CS/ goes high
2a) select the ADG704 ch2 through A0,A1 inputs
2b) AD7940 CS/ goes low
2c) AD7940 start sampling
2d) AD7940 CS/ goes high
3a) select the ADG704 ch3 through A0,A1 inputs
3b) AD7940 CS/ goes low
3c) AD7940 start sampling
3d) AD7940 CS/ goes high
4a) select the ADG704 ch4 through A0,A1 inputs
4b) AD7940 CS/ goes low
4c) AD7940 start sampling
4d) AD7940 CS/ goes high
I started with a basic test having a signal at ch1 and 0V in ch2,ch3,ch4 and with this code I got some signal in ch1 and ch2. If I do the same with ch2 I got some signal at ch2 and ch3 and so on.
I have no idea why this happen and this is why I am asking for your help,
Anyway I have been able to get rid of the problem inserting a small delay (5 us) between steps a and b:
a) select the ADG704 ch2 through A0,A1 inputs
.) 5 us delay
b) AD7940 CS/ goes low
c) AD7940 start sampling
d) AD7940 CS/ goes high
With this additional delay if I put a signal at ch1, I read it correctly.
Do you have any idea about what I have seen?
Best regards
