I am having trouble understanding the I2C trace I am seeing when communicating with the ADG715. I'm using an Espressif ESP32 to communicate with the ADG715 and operating at 200kH.z.
The device is functioning normally in that the circuit I am using it in appears to be working without any issues. But I have a question about the trace which is shown in the image below.
The ADG715 appears to act on the data being written for the switches immediately upon the clocking of the last of the 8 data bits for the switch settings into the internal shift register. See the 3rd channel in the trace below. That falling edge occurs when one of the switches in the ADG715 closes as a result of writing DF. The switch closes in less than 90uS from the rising edge of the last data bit clock pulse. I would havethought that the entire I2C write cycle would need to complete before the ADG715 would set the switches per the data written. This is not causing a problem for me, but I was very surprise to see it. Is this the way devices like this normally work?
Thank you for any feedback!
Removed issue regarding ESP32 which muddled the question a bit. Made the focus on the ADG715 specific aspect.
[edited by: mbratch at 2:34 PM (GMT -4) on 10 May 2022]