Hello everyone, I have a question related to ADG734. In a certain application, there is a need to switch between different signal lines that are at a negative voltage around -0.7 to -0.2 V. For that reason, an ADG734 IC used with VDD=+3.3 V and VSS=-1.2 V (and not 0 V). The digital input lines that control the four SPDT switches inside the IC are connected to GPIO pins of another system and swing between +3.3 V and 0 V.
The datasheet of ADG734 states that, with VDD=3 V and VSS=0 V, the input low voltage (VINL) is 0.8 V maximum. Is it right to assume that, for VSS=-1.2 V, VINL=VSS+0.8 V = -0.4 V maximum? If yes, then having the digital input signal that controls the switches at 0 V should NOT be OK and some sort of level shifting, e.g. using a MOSFET switch with VSS=-1.2 V should be used. Is my assumption correct? Please advise.