ADG708 Power sequence

Hi Elver,

Tieing the ENABLE pin permanently to GND on the ADG708 CMOS switch, will ensure all 8 switch channel are off.

See Truth Table below: (pg 11 of ADG708 Datasheet)

Just so I am clear, is the main objective here to keep all 8-channels off, while the power is applied ?

Regards,

Kevin

Hi Kevin - sorry that was my error - I mean if the ENABLE is tied high so that the mux is permannently enabled

Hi Elver,

Would you be able to provide an image or a block diagram of your application.

If Enable is tied high depending on the inputs to the Analog input channels any number of switch channels could be ON.

To answer your question on risk of damage, the least risk of damage will be when the switch is OFF or when the switch is ON and within the Performance / Max Rating of the device.

Will need more information here to fully answer this questions, please provide block diagram / circuit image.

Regards,

Kevin

I've attached a drawing of the mux circuit. It is measuring a set of 8 passive complex impedances. The impedance measurement is made with an excitation waveform at 500mVpp sine wave with a 1.13V DC bias.

The EN pin would be tied to the 3V supply so this digital input would be high as soon as power to the circuit is applied.

The other digital inputs (A0..A2) would be controlled by a microcontroller and would all initialise as logic low.

Many Thanks

Hi Elver,

The drawing of the ADG708 Mux circuit above, should work correctly in a real application.

As long as the excitation waveform at 500mVpp sine wave with a 1.13V DC bias is kept within the Performance Max ratings of the device, the switch should perform correctly.

Regards,

Kevin

Hi Kevin - many thanks for your help looking into this

Regards

Elver

Hi Kevin - many thanks for your help looking into this

Regards

Elver