ADG2128 : I2C Commands onto Evaluation Board (LDSW OFF)

Hi,

I'm using the ADG2128 evaluation board to monitor the I2C exchange to configure the switch.

Goal is to be sure that our firmware (that will drive ours 5 ADG2128 onto our board) will sent the correct I2C commands.

Onto my future board, i can use TRANSPARENT mode as explained in the datasheet, so each Switch can be update sequentially. No problem with that.

To mimic this behavior, i set bit LDSW to OFF onto the application software (OFF set the LDSW bit - this is what i did onto my firmware).

I choose a basic X0 connected to Y0 as an example. All others are OFF.

I see the following I2C commands (SALEA trace). I2C address is 0x72 onto my board (set it onto the evaluation software).

WRITE 0x72 data 0x80 0x01   ; This is the expected value related to the datasheet

But After this first I2C command, another I2C command is sent:

WRITE 0x72 data 0x6F 0x01   ; WHY THERE IS THIS I2C Command in this mode ?

Is it useless ? Mandatory ?

Reading the datasheet it seems mandatory ONLY when not in Transparent mode.

Thanks for your help.

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  • +1
    •  Analog Employees 
    on Feb 4, 2021 11:27 AM

    Hi Jean-Jacques,

    The input shift register is 24 bits long. It is composed of the device address where the MSBs (DB23 to DB17) are set to 1110, and the LSBs set the slave address at pins A0 to A2 (LK1 to LK3 in the evaluation board).



    If your application requires the switch to change state upon writing the command, set the DB0 or LDSW to 1 (Transparent Mode). If not, set it to 0 (Latch Mode). Setting the LDSW to 1 is not mandatory, and it's highly dependent on your target application.

    For the I2C commands, do WRITE 0x72 data 0x80 0x01 and WRITE 0x72 data 0x6F 0x01 included in your firmware? What are the specific switches are you trying to control? Which part of your question are you referring to if mandatory or not?

    Best regards,
    Christian 

Reply
  • +1
    •  Analog Employees 
    on Feb 4, 2021 11:27 AM

    Hi Jean-Jacques,

    The input shift register is 24 bits long. It is composed of the device address where the MSBs (DB23 to DB17) are set to 1110, and the LSBs set the slave address at pins A0 to A2 (LK1 to LK3 in the evaluation board).



    If your application requires the switch to change state upon writing the command, set the DB0 or LDSW to 1 (Transparent Mode). If not, set it to 0 (Latch Mode). Setting the LDSW to 1 is not mandatory, and it's highly dependent on your target application.

    For the I2C commands, do WRITE 0x72 data 0x80 0x01 and WRITE 0x72 data 0x6F 0x01 included in your firmware? What are the specific switches are you trying to control? Which part of your question are you referring to if mandatory or not?

    Best regards,
    Christian 

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