Post Go back to editing

Observation path ADC is not on the list of target interface when using Simulink HDL Workflow advisor

Category: Software
Product Number: AD9371

I'm using an AD9371 for a custom IP application with DPD. I have built the simulink model and want to use HDL targeting workflow provided by ADI.

I expect to use two ADC input, one of them is the receive path and the other is observation path, so that some DPD algorithm can be done on my IP logic.

However, it seems there's only two ADC input path in the HDL workflow target interface, as shown:

I presume they are for two receive path instead of observation path? Does this mean that for AD9371 and AD9375, it's not possible to design custom FPGA IP for observation input on simulink?

Thread Notes

Parents Reply Children
  • Observation path IP insertion is not implemented. With the current code you would either need to generate the IP and stitch it in with Vivado IP integrator or enhance Transceiver Toolbox to support that path. I added an enhancement request here but we cannot give an ETA on when it would get implemented.

    Would you require interfacing with both the transmit and OBS paths in the same IP? Do they need to operate on different clocks?


  • Thank you for your response!

    I checked the vivado project created by HDL targeting workflow yesterday and verified it's true. My original intention was using two tx, one rx, one obs rx for the IP core and make a DPD algorithm on the FPGA. I realize that this could indeed be difficult since obs and txrx do not run on one clock. It may also require modifying the HDL reference design, huge amount of work....

    Fortunately my application requires only a working DPD, so I choose to change my card to an AD9375. In this way I also don't have to implement a DPD in the FPGA which does not seem to be a good option for that.