I implemented a peak search algorithm in HDL reference design targeting platform is ADI ADRV9361-z7035 . Let me first talk about my algorithm.
1- I am calculating bin from Xilinx FFT core ( 8192 points ) inserted in ADC path
2- Then I slice 32 bit output data coming from FFT into 16 bit slice into I and Q , multiplying I*I and Q*Q and add I2+Q2 . This gave me a scalar magnitude
3- Then I compare this scalar magnitude with a threshold ( I am giving this from VIO) . and if RF-IN is very strong ( upto -30 dBm) this algorithm give me the correct index but if signal is weaker than -30 dBm then I am getting garbage value and incorrect index
The board is capable to detect weak signal as much as -90dBm as i confirmed by using ADI built-in IIO Oscilloscope but here I got peak only for very strong signal and garbage and incorrect index for weaker signal .
is there any better way to calculate peak or any suggestion to improve this logic .