iio and pyadi-iio buffer flow control how to tell how full a tx buffer is or rx buffer has data in it

Assuming you are pulling data or pushing data fast enough, the rx and tx methods will block when the internal queues fill (on TX) or have no data (on RX).  Underflow and overflow events are exposed through registers and not directly in the buffers. This feature comes from the HDL which is not applicable for all hardware that libiio supports. This is why it's not currently integrated together. These registers are accessible through libiio but are not tied into the datastreams.

To my knowledge libiio does not expose the internal queue of the DMA. You would have to dig more into DMA driver itself.

Please see here: High-speed mmap interface

The in-kernel IIO driver are using the Linux DMA engine drivers.

-Travis

Thanks Travis,

Good information to know.The sample rates are fairly slow. This is a narrow band application so I believe the app should be able to keep up with the sample rate easily. The sample rate is less than 1Msps.

How would  the user app read the underflow and overflow registers? Is there a python method that allows access? Where are they located in the register memory map and are they exposed to the python interface? A quick snip of could would be good to look at.

Leonard.

btw the part is the AD9361 / 4 . Currently using it on the Pluto for demo purposes.

Something like this should work:

sdr = adi.Pluto()

r = 0x80000088
# Clear status bits
sdr._rxadc.reg_write(r,0x6)

# Check for overflow
def print_on_overflow(dev,is_rx,r):
	status = dev.reg_read(r)
	if is_rx:
	    if status & 0b0100:
		    print("Overflow")
		    dev.reg_write(r,status)
	elif status & 0b0001:
		print("Underflow")
		dev.reg_write(r,status)
	

while True:
	data = sdr.rx()
	print_on_overflow(sdr._rxadc,True,r)
	sdr.tx(data)
	print_on_overflow(sdr._txdac,False,r)

-Travis

OK thanks

the code you have above was only was giving me underflows and not overflows.

when I reduced the while loop to this:

while True:
    # data = sdr.rx()
    print_on_overflow(sdr._rxadc, True, r)
    sdr.tx(iq)

forcing to always over flow and still had only underflows.

I changed the function to this:

def print_on_overflow(dev, is_rx, r):
    status = dev.reg_read(r)
    if is_rx:
        if status & 0b0100:
            print("Overflow")
            dev.reg_write(r, status)
    else:
        if status & 0b0001:
            print("Underflow")
            dev.reg_write(r, status)

and I believe this works for both under and over flows.

Thanks Travis.

L

Ah thanks. I guess that's what happens when I write from memory. I've updated my original code.

-Travis

Thank you very much for the code snippets.

Where can I find information about this particular register? I'd like to read more about the meaning of each individual bit.