I want to create a project with ZC7035 part and AD9361 in the enviroment of Vivado 2016.2. I downloaded the HDL source code from https://wiki.analog.com/resources/fpga/docs/releases and the version is hdl_2016_r2.
But I found that it does not support ZC7035 natively. So I tried to modify the part to ZC7035ffg676-2 and upgrade all the IP cores using other development board versions(e.g. Zed, ZC706), then I got so many critical warnings about pin configuration, importantly there are some xdc configuration conflicts. It‘s difficult to correct them one by one.
So Is my operation correct? Please suggest me If I am wrong. And is there any other method to solve this problem?
thank you all so much!
When changing the project to use a different FPGA you need to make sure the connections between the pins of the new FPGA and the AD9361 and other peripherals in the systems are correct.
We have a short guide on how to port our projects on new carriers: https://wiki.analog.com/resources/fpga/docs/hdl/porting_project_quick_start_guide
We usually recommend using the latest release, as many things change between several releases and we are not able to support older releases.