I have a zynq-adrv9364-z7020 board in combination with a ADRV1CRR-BOB.
I've been experimenting with the iio driver and have a question regarding where I can find information about what the devices found actually are and that the channels and they're attributes represent.
For example I can imagine (from the name) that iio:device1: ad7291-bob has something to do with the bob board. Yet nowhere have I been able to confirm this through any documentation. Furthermore have yet to find any information on what for example the channel "voltage6" for this device refers to.
For something like the iio:device2: ad9361-phy (which I think is the iio interface to the AD9364 chip) it would be good to have some documentation on what the values for, for instance, the sampling_frequency_available value attribute actually represent.
Generally, documentation is available on our Wiki ( wiki.analog.com ) and schematics for boards also on analog.com
https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/ADRV1CRR-BOB.html (since it's a breakout board, there isn't much SW documentation for it).
For the AD9361 Linux driver, a good place to start is:
For IIO Linux & libiio:
https://wiki.analog.com/software/linux/docs/iio/iio ( a generic look at the Linux IIO framework)
https://wiki.analog.com/resources/tools-software/linux-drivers-all (these are the Linux drivers that are currently documented)
https://wiki.analog.com/resources/tools-software/linux-drivers/iio-adc/ad7291 (this documents AD7291 in general and how channels are described ; this is usually generic)
https://wiki.analog.com/resources/tools-software/linux-software/libiio & https://wiki.analog.com/resources/tools-software/linux-software/libiio_internals (this is for userpace stuff)
The combination matrix for many IIO devices is so vast, that when the kernel IIO framework was implemented, devices would get numbered by the order in which they are probed by Linux.
Then each device provides a set of generic attributes by which it identifies itself.
Specifically, for your use-case, what you need to do, is kind of piece together these bits of info and then use them.
And if you need to know which "voltage6" channel is matched to which physical pin, if it's unclear, you can always just apply a stimulus on each pin and see which one reads information.
If you do find something specific that should work [in a way] and it doesn't, feel free to notify us and we can check.
Thanks for the information. Sadly most of this I had already found and I believe these pages don't provide the required information to understand the quick start project and to start developing your own application.
For instance it would be very helpful if I could actually get the code used to generate the quick start project. Where can I find (or how can I create) the board support package for this board and carrier and where is the project used to generate the bitstream for the FPGA? Does this example project even use the FPGA? To me these seem like basics which do not appear to be addressed in the documentation. But perhaps I'm missing something so please correct me if I'm wrong.
Regarding the FPGA stuff, the guide for the zynq-adrv9364-z7020 board has some references on using FPGA with the board.
But, we don't have a quick-start guide thingi [as XIlinx Vivado has].
We typically build our reference designs using Vivado & Quartus, and add our devices in the designs, and provide them as reference.
Vivado & Quartus are great for generating quick-start projects for boards made by Xilinx or Intel.
If you have some specific questions regarding some details, we can try to answer those here.
For HDL stuff see https://wiki.analog.com/resources/fpga/docs/hdlIt all starts from https://github.com/analogdevicesinc/hdl/blob/master/README.mdAndrei
Thank you for the link to the github. I've managed to generate the vivado project for my setup from the provided sources. I might get back to you about generating the BSP but I'll explore the project more first.
Now if I may be so bold and offer some advice on the information provided in the git project.
I had seen the page before but never realized this could be used to generate a vivado project. The README states how you can build the project but nowhere on the page does it say why you would want to build the project or what the result will be. If the README had stated this clearly I would have followed the one link (out of almost 20) on the page that describes the build process in detail and does state that building will result in a vivado or altera project.
Just adding this little bit of extra information could save people a lot of time.