I'm simulating a circuit in LTspice with third party spice models aaded to it. I encountered several errors but got them solved with the help of many forums. The last error message was "Analysis: Time step too small; initial timepoint: trouble with u3:40ua-instance j:u3:12" I tried the following as it was recommended on a forum
But now I'm not getting the desired results. My circuit is shown below, it is a biasing circuit of an RF PCB which should give 50 V on "Vout" node and -5-0V regulated voltage on "Vgate". This circuit is taken from Ampleon application note AN11130. Schematic file is attached below. Any help would be highly appreciated.