June Mini Series Challenge #2

If you missed it last week, here is the link to our first challenge question:

https://ez.analog.com/studentzone/f/discussions/546189/june-mini-series-challenge-1 

Here is the second question: 

The image below shows a differential amplifier circuit with the differential input voltage VIN and the single-ended output voltage VOUT. 

  1. What is the small-signal gain of the amplifier in terms of the transconductances and output resistances of M1, M2, M3 and M4? 
  2. What limits the bandwidth of this circuit? 
  3. What components in the circuit can cause a voltage offset at VIN? Why? 
  4. What change to the circuit needs to be done in order to make it operate as a buffer with unity-gain? 
  5. What is a possible implementation of the current source ISS? 



Updated formatting
[edited by: hschrall at 4:59 PM (GMT -4) on 21 Jun 2021]