The soc mentioned on the PlutoSDR page is the XC7Z010-1CLG225C 

    The specification for the Pluto mentions that it is a single core device but if I open the datasheet for the same part number on xilinx website it shows its dual core. 

    So what exactly is it…

  • I2C on PlutoSDR

    In order to interface with various peripherals, I would like to use I2C on PlutoSDR.

    There is already a i2c-0 on /dev but guess it is an internal I2C bus.

    Is there already I2C reachable through MIO pins ? If yes, which one ?

    if not, can you point me an…

  • Why no timestamping in PlutoSDR?

    I was wondering why there is no precision timestamping in the PlutoSDR, something akin to what Ettus does in their USRPs?   Is it simply because it is an educational tool or is it something else, like a limitation in libiio?  I really like the PlutoSDR …

  • PlutoSDR Advanced Debug

    I would like to control BIST, as well as other parameters that show up on the IIO 'Scope Advanced tab. I found this link:

    AD9361 high performance, highly integrated RF Agile TransceiverTm Linux device driver [Analog Devices Wiki] 

    but it requires either…

  • PlutoSDR supports gnuradio rfnoc blocks?

    Does the PlutoSDR support RFNOC blocks in gnuradio? Best, Chris

  • PlutoSDR raw data interpretation

    Need help to interpret the raw data from PlutoSDR

    [-0.01074219-0.00537109j -0.00830078+0.02246094j -0.00146484+0.01171875j
     ..., -0.00732422+0.00878906j  0.00097656+0.00585938j

    The data is FM radio signal and software used is python…

  • PlutoSDR Mass Storage Path

    If I wanted to read a file or write a file to the mass storage portion of the radio (the folder that comes up when you plug the radio into a pc), what file path would I use in my fopen command? Where is the mass storage located in the file structure of…

  • PlutoSDR v0.32 iio_reg can't read registers

    Hello ADI

    I found that 'iio_reg' inside PlutoSDR always reads register at address 0x00.

    Inside PlutoSDR with SSH:
    # iio_reg cf-ad9361-dds-core-lpc 0x80000000
    # iio_reg cf-ad9361-dds-core-lpc 0x8000000C
    # iio_reg cf-ad9361-dds-core-lpc…

  • PlutoSDR FPGA interpolation issue ?

    Firmware 0.32 based (bitstream and buidlroot)

    Please advice : could not understand how interpolation filter is working : as my understanding, it is a 8x interpolator, meaning 8x upsampling and apply FIR filter with 0.125 fs.

    In order to reproduce the…

  • PlutoSDR Default Tx Power

    Hi all,

    The default transmit power of the pluto is -10 dBm. Is there any way to change this without recompile the firmware?