Here are a few initial questions.
I have a design that requires the use of AD9204 to sample a single ended DC signal, do not know how to connect analog front end circuit.
The current design is to connect the AD9204 analog input AIN- to the GND, and the single ended DC signal is connected…
We have a question about AD9204 & AD9231 High Speed ADCs. (both BCPZ-40) We would like to know the analog input circuit which acquired the AC SPECIFICATIONS on the data sheet.
There is specification at fin=200MHz.
Our usage. Fin…
I checked regarding question #2, and yes, the timing parameters tS and tH between CSB and SCLK also apply to stalling mode.
The datasheet for the AD9204 mentions having the option of mulitplexing the output data but does not go into any detail on how to do this. Can someone supply me with the specifics on how to go about doing this?
The single Zeus (AD9609/29/49) S-Parameters are the same as the dual Zeus (AD9204/31/51) family. It has the same ADC core just reduced to one channel.
As AD9204 is pin-pin compatible with AD9608, could AD9608's full scale input also be set to 1Vpp?
I saw the register description in AD9608 datasheet has the full scale adjust reg, but I cannot find any other inform in the datasheet:
I think the datasheet of AD9608 made a mistake on the digital output timing of CMOS interleave mode:
If the interleave mode is really working as above, how could it be helpful to reduce pin count? That I will lost CHA N-15, N-13, N-11,etc if only…
If your bandwidth is +/- 16.896MHz, then a dual 10 bit ADC with a 80Msps sample rate should be sufficient for your design. The AD9204 would be a low power solution used in many similar applications. I am not an expert on the baseband processing…