Hi WebMastor,
I am engaged in a project that involves vehicle’s velocity and traffic statistic, and its configuration is “FPGA + DSP”. Before debugging mage processing arithmetic on bf531, I have validated the arithmetics(such as binary image de-compress…
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Hi,
I am trying to build the old project in visual dsp 3.5++ , which was built in development tool 6.1. In this project there is .dsp file which as following code
MODULE/ABS=0 Driver_Runtime_Header;
.GLOBAL ___lib_prog_term;.EXTERN ___lib_setup_everyth…
Hi, thank you for you're answer.
I have upgraded my software to the October update, wich is working.
My board come from http://www.kk7p.com/dsp.html , i'm using the windows loader that is on this web page.
I am finaly able to load a _very_…
Hello all,
Does ADV7513 support below format ?
Format RGB888Horizontal resolution, Vertical resolution, Frame rate(fps) 1280 720 30 1280 720 60 1280 1024 30 800 480 30 800 480 60 640 480 30
Format YUVHorizontal resolution, Vertical resolution, Frame…
I have a ADV7619 HDMI Receiver Setup. The problem that i am facing currently is when i drive any of NON CEA Timings not mentioned in the 861D spec the video output is not correct. I read the user guide of ADV7619 but was unable to find any relevant information…
because a lot of these examples were moved from earlier releases of VisualDSP++, you may find that the way the Interrupts are handled by the LDF does not match the more recent default LDFs, such as in this case - the example just has a single block…
Hi Shafi,
Place an SSYNC instruction after you write to DMA4_IRQ_STATUS register (before performing RTI). This would ensure that the peripheral releases the request before the RTI is executed. Another best thing is to perform a dummy PAB access before…