• RE: Single OpAmp with Class AB output stage

    Hi ZoltanDTI,

    thanks for your reply. Capacitive Load is no issue as it would imply when reading OPA202 datasheet. for me the output stage design is of most importance. So i have had a second look at the OpAmp table and could find OP249 which has an output…

  • RE: 偶然发现,大家都辣么爱AD8620!

    AD8620A、AD8620B:同一型号的两个系列,B比A精度高。性能指标与OPA627差不多,只有一个大差别:带容性负载时的高频振铃现象比 OPA627好了很多。这使得AD8620更加适合应用在滤波电路中,这次测试用在CD的模拟滤波应该优势明显。AD8620BR:声音中性,各频段分析力极强。低音弹性很好,中频还原准确,高频极细致且不吵耳,所有细节历历在目。最突出的优点是优良的空气感,听起来真是一身贵气,有点象OP249加了一个音频激励器,令人换上去就不想拿下来,静静地陶醉其中。这是我所有运放中最中意的一款…

  • RE: ADF4159 - Hardware and Software setup

    Hi !

    Thanks for the prompt feedback, please find attached the ADIsimPLL file (renamed as *.txt instead of *.pll) and the configuration file we use with ADF4158/9/69 PLL Software (version v4.10.6 July 2015)

  • TAGS LIST: Amplifiers

    AD600
    AD602
    AD603
    AD604
    AD605
    AD8264
    AD8330
    AD8331
    AD8332
    AD8334
    AD8335
    AD8336
    AD8337
    AD8338
    ADL5246
    ADL5330
    ADL5331
    LTC6412
    HMC6187G
    HMC997G
    HMC996
    HMC694G
    AD8368
    AD8351
    AD8367
    AD75071
    AD552…
  • RE: HMC767 reference divider, lock detect

    Hi, 

    Let's work through each issue and see if we can get it to lock.

    1) I suspect that the reason the part rails when you change the R divider value is that you aren't "re-training" the LD window. Each time the R divider is changed you need to tog…

  • RE: 非常实用、超详细的锁相环常见问题解答~

    问题:参考晶振有哪些要求?我该如何选择参考源?

    答案:波形:可以使正弦波,也可以为方波。

    功率:满足参考输入灵敏度的要求。

    稳定性:通常用TCXO,稳定性要求< 2 ppm。这里给出几种参考的稳定性指标和相位噪声指标。

    名称 频率范围(MHz) 频率稳定度(ppm) 相位噪声dBc/Hz@10kHz 价格
    普通晶体振荡器SPXO 1~100 +/-10~+/…
  • ADI运算放大器选型指南

    ADI运算放大器选型指南

  • RE: 发帖就送话费啦(限前一百名哦),还有大奖等您拿(获奖名单已公布)

    好资料,在一个论坛下载的,与大家相关的话,可以参考参考

  • ADI技术指南——电路仿真和PCB设计

    ADI技术指南——电路仿真和PCB设计

    官方资料仅供学习使用

  • RE: AD9528 jitter question

    Chapter 9 Hardware Design Techniques F.pdfHi XY,

    let me respond to your questions:

    If we use Buffer Mode, Output Additive Jitter is about 140fs. so total rms jitter for AFE ADC clocks should be roots.quare(100*100+140*140+54*54) = 180.3fs rms. Is my perception…