I am using this umodule, in order to get 24V 6A from 18V-36V. I noticed that when the current is more than 3A, VOUT starts to derate to 14V and less. I a dont limit current in or out.
I also noticed that efficiency is ~60%.
When I checked the…
I have a LTM8055 Demo DC2017A, the LTM8055 datasheet shows input can be +5V, but when I add +5V to DC2017A input, the output is only 1.65V; when I rise the input voltage above 5.7V, the output is 12V corrently.
where is the problem? Could…
The spec in the data sheet is for the following condition:fsw = 300kHz (RT = 84.5k ohm)Vin = 12VVout = 12V
Because the internal LDO is powered by VIN, the LDO’s power loss increases with VIN (increased voltage drop across LDO). Also, an increase…
Feedback from design: Unfortunately, there is no equation. The SS cap clamps the VC node, but the voltage at which the switching starts and the regulator comes into regulation varies with the IC and is also dependent upon the load.
Regarding LTM8055 data sheet, I can see the output ripple noise is very low as follows.
However our customer measured the noise on the demo board DC2017A as follows. The ripple noise is 588mVp-p at Vout=12V, Iout=1.2A.
Off course the probe setting…
"The maximum output current depends upon the input voltage. Higher input voltages yield higher maximum output current."
why? just because of the more input power with higher Vin?
the largest output current is 8.5A, so what's the largest input…
My customers are thinking about using two LTM 8055.
Therefore, They decided to draw a circuit by the composition of data sheet P.20.There is a LT1636 between the two LTM 8055.
#1 In the case of the circuit configuration shown below, is there a detailed…
Regarding the LTM8055,
Table 1, on Page 10 of the datasheet, recommends the use of electrolytic capacitors for Cout for all combinations of input and output voltages. Is that necessary for stability or is it just perceived to be a more cost effective…