• LTM4646 Queries

    Hi,

    We are using LTM4646 in our design.

    We have below questions,

    • LTM4646 in Dual Output and Vout1 and Vout2 connected together, i.e. Vout1=Vout2=5.5V. As per this   VoutS1,PGOOD1, Track/SS of VOUT1 should be left open?
    • VFB1 should be connected to INTVCC…
  • About LTM4646 Power Dissipation

    Hi I am using LTM4646.

    In Figure 11 of the datasheet, is the power loss value single output?
    Or is it the sum of the dual outputs?


    I am using it below.
    1. Input +12V
    2. Output +4.15V
    3.Composite output by connecting output 1 and output 2

    About 0.43A of +12V…

  • LTM4646 Output Voltage Failure

    Hi,

    We have a critical issue with LTM4646 output voltage.

    The two outputs of the device are connected together to generate Vcore of 0.95V with current of ~15A.

    I should mention that the LTM4646 isn't connected directly on our board but on an adapter.…

  • About single output 20A in LTpowerCAD of LTM4646

    Hello

    I would like to use it with a single output / 20A of LTM4646.
    I want to design using LTPowerCAD, but I couldn't put the channels together in LTM4646.
    Since I was able to combine channels with LTM4668A, I think that LTM4646 does not support it…

  • What happens if VRNG pin of LTM4646 stays unconnected?

    The datasheet tells me that: the VRNG pin can be used for current limeting:

    "Current Limit Adjustment Range. Tying this pin to INTVCC sets full 10A current, or tying to SGND will lower the current limit to 5A. Default to INTVCC."

    The last three…

  • LTM4644 & LTM4646 minimum output current

    Hello,

    I'm investigating the devices LTM4644 & LTM4646 as a solution to power a Zynq MPSoC device. Thanks to the multiple output capability, it'd be a nice solution.

    However, power analysis from tools and datasheets from Xilinx show various…

  • LTM4646 LTSPICE Model in parallel

    Hi,

    I'm running an LTSPICE simulation of 2 LTM4646 devices.

    Vout 1 and 2 of the first device and vout 2 of the second device are tied together to supply sufficient current. 

    Is it possible to simulate three device outputs in parallel using the LTSPICE…

  • LTM4646 Schematic help review

    Hi there,

    we newly import LTM4646 into our project for the frst time. To be careful, we would like to ask for asisting review. Insight of LT/ADI expert will be appreciated. .

    SCH as PDF attached, and Load conditions are text-noted nearby the output port…

  • LTM4646 transient response

    Hello,

    I want to power the VCCINT (0.85V) of a Xilinx FPGA. I intend to use the LTM4646 regulator in dual mode. However, I see the 1V Single Phase Single Output  Load Transient Response in the datasheet and it's 33mV undershoot on Vout. Which in this…

  • RE: LTM4646 - power outputs shorted to GND net

    I just wanted to follow up on this.

    The reason the nets were shorted was that R3 and R6 on my PCB were milliohm values. They were defined with the lower-case 'm' in the LTSPICE demo file, and so I ordered them that way. After I realized those resistors…