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  • Clock problem with ADCLK925 and AD9695/AD9739

    RknMgn
    RknMgn

    Hello

    I am using AD9695 and AD9739 with an ultrascale FPGA, on custom board.

    We have no problem with the design, until we load a high consumption bitsream into the FPGA.

    When the a full FPGA is loaded, the input clock (1280MHz) is no longer detected by…

    • over 1 year ago
    • High-Speed ADCs
    • Q&A
  • RE: How to use EVAL01-HMC361G8

    ChrisPearson
    ChrisPearson

    The product operates down to 10MHz square wave. Preferrably witith a 100ps rise, fall time.  In this case 5MHz should be present on the output.  If you are using a sine wave, the minimum input frequency the device works with is 200 MHz.  

    For 10 MHz inputs…

    • 7 months ago
    • RF and Microwave
    • Q&A
  • RE: LTC6957 parallel clock tree

    DST_ERA
    DST_ERA

    Hello Chris,

    thank you very much for the plot of the LTC6955.

    I can't precisely specify phase noise requirements because of proprietary stuff but we can communicate it through email if you want.

    Do you have a phase noise specification of used Pascal…

    • over 2 years ago
    • Clock and Timing
    • Q&A
  • RE: Can I use HMC6832 for LVDS data clock fanout?

    ChrisPearson
    ChrisPearson

    That is correct the internal input capacitors will cause an initial CM ramp if you go from a DC signal to a AC signal.  Some of the LTC6954/55/57 buffers do not have this input cap, but the common modes do not necessarily line up with LVDS.  So maybe you…

    • over 1 year ago
    • Clock and Timing
    • Q&A
  • RE: LVDS and LVCMOS output clock in phase

    ChrisPearson
    ChrisPearson

    Hello Gerrit,

    You may want to look in our clock generation devices link.

    https://www.analog.com/en/products/clock-and-timing/clock-generation-distribution/clock-generation-devices.html

    In here I would look at some of the devices with lower frequency …

    • over 2 years ago
    • Clock and Timing
    • Q&A
  • Q1: Cannot load COM Module

    andreialejandro
    andreialejandro

    If you receive a Cannot load COM module error message when trying to install a driver for a demo board using QuikEval, the following locations can be used to manually install the COM module. After downloading the module, run the installer and the software…

    • 28 days ago
    • Precision ADCs
    • Documents
  • RE: Cannot load COM Module

    JellenieR
    JellenieR

    Hi Guy, 

    Thanks for this. I just copy paste the info here below to close this thread. 

    Part Number DC Board Number Class ID Url
    ADL5920 EvalADL5920 D5596 ltspice.analog.com/.../ins5596.msi
    LT3964 DC2424A D3964 ltspice.analog.com/.../ins3964.…
    • 28 days ago
    • Precision ADCs
    • Q&A
  • RE: Divider-by-3 duty cycle

    ChrisPearson
    ChrisPearson

    Hi Gil,

    The /3 of the HMC794 does produce a 50% output.    However, it looks like your 25M-100M input frequency is below the HMC794's min input frequency

    R Counter outputs are typically not 50%. 

    You can also look at the LTC6954.  This device has a /3…

    • over 2 years ago
    • RF and Microwave
    • Q&A
  • RE: Clock tree with LTC6951 as reference and LTC6952 as clock distribution in parallel sync?

    ChrisPearson
    ChrisPearson

    I think to answer this question fully I will need to understand your reference frequency, how many clocks and SYSREFs you need, and your clock frequencies.  From your description, I'm not exactly sure what you is being asked.

     Usually you want a ultra…

    • over 3 years ago
    • Clock and Timing
    • Q&A
  • RE: Multicard Synchronization

    ChrisPearson
    ChrisPearson

    Application Note 165 is a good starting place.  

    The big question is are you generating and distributing the 500MHz  clock on one board and then distributing that to your other cards.  Or are you sending a reference frequency from one board to your other…

    • over 1 year ago
    • Clock and Timing
    • Q&A
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