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LTC6954: Startup

D_Who

Hello,

from the datasheet i would excpect the LTC6954 to have an active output after power up without further programming. Is this correct?
However, in measurements without programming I was not able to detect any output. Are there some typical mistakes…
- 9 months ago
- Clock and Timing
- Q&A
RE: LTC6954's EZ Sync system

ChrisPearson

Hi Sorry for the delay. Not sure why I was automatically notified regarding this email. Yes, EZSync should work great, and it sounds like operator error. Are they just trying to synchronize one LTC6954 or multiple EZSync devices?
- 3 months ago
- Clock and Timing
- Q&A
RE: LTC6954 Clk-Input: Inverting LVDS Signals for Efficient PCB Layout

ChrisPearson

Yes, this is possible and will not degrade jitter.

If you are setting all the LTC6954 dividers = 1, then it should work great

If you are using any of the LTC6954 EZSync features, that involve stopping the input reference at a differential low, then make…
- 4 months ago
- Clock and Timing
- Q&A
RE: Output impedance of the LTC6957-3

ChrisPearson

Lukas,

Based on these plots, it looks like the LTC6957 CMOS output has ~30-40 ohms resistance. Some variation with temperature.

On the eval board we had to plan for the CMOS signal going into a 50 ohm termination to ground. However, on your board you…
- 2 months ago
- Clock and Timing
- Q&A
RE: LTC6957 parallel clock tree

DST_ERA

Hello Chris,

thank you very much for the plot of the LTC6955.

I can't precisely specify phase noise requirements because of proprietary stuff but we can communicate it through email if you want.

Do you have a phase noise specification of used Pascal…
- over 1 year ago
- Clock and Timing
- Q&A
RE: Clock buffer for AD9684

Clarence.Mayott

How many parts are you fanning out to? The AD9508 is a good part as is the LTC6954.
- over 4 years ago
- High-Speed ADCs
- Q&A
RE: LVDS and LVCMOS output clock in phase

ChrisPearson

Hello Gerrit,

You may want to look in our clock generation devices link.

https://www.analog.com/en/products/clock-and-timing/clock-generation-distribution/clock-generation-devices.html

In here I would look at some of the devices with lower frequency …
- over 2 years ago
- Clock and Timing
- Q&A
RE: Can I use HMC6832 for LVDS data clock fanout?

ChrisPearson

That is correct the internal input capacitors will cause an initial CM ramp if you go from a DC signal to a AC signal. Some of the LTC6954/55/57 buffers do not have this input cap, but the common modes do not necessarily line up with LVDS. So maybe you…
- over 1 year ago
- Clock and Timing
- Q&A
RE: Divider-by-3 duty cycle

ChrisPearson

Hi Gil,

The /3 of the HMC794 does produce a 50% output. However, it looks like your 25M-100M input frequency is below the HMC794's min input frequency

R Counter outputs are typically not 50%.

You can also look at the LTC6954. This device has a /3…
- over 1 year ago
- RF and Microwave
- Q&A
RE: Clock tree with LTC6951 as reference and LTC6952 as clock distribution in parallel sync?

ChrisPearson

I think to answer this question fully I will need to understand your reference frequency, how many clocks and SYSREFs you need, and your clock frequencies. From your description, I'm not exactly sure what you is being asked.

Usually you want a ultra…
- over 2 years ago
- Clock and Timing
- Q&A