• LTC6954 Minimum Input Frequency

    Hello,

    I'm trying to sync a 0.4Hz signal (200ms pulse width), that's why I'm interested in the minimum input frequency of the LTC6954.

    Since there is no minimum value given in the datasheet, I assume, it will work with 0.4 Hz on the inputs…

  • Feasibility of double input Reference on LTC6954

    I have double reference sources available on my system, but just one is ON in the operating condition.

    The Reference sources are two LVCMOS square clock at 100 MHz. At any time, when the first one is ON the other is OFF, and viceversa.

    I adopted the LTC6954…

  • LTC6954's EZ Sync system

    Hi

    I have a question about the LTC6954's EZ Sync system.
    Does the LTC6554's EZ Sync system work well when the device's three outputs are operating at different division ratios?
    My customer is having trouble with it not working well at a 1: 2…

  • LTC6954: Startup

    Hello,

    from the datasheet i would excpect the LTC6954 to have an active output after power up without further programming. Is this correct?
    However, in measurements without programming I was not able to detect any output. Are there some typical mistakes…

  • LTC6954 Clk-Input: Inverting LVDS Signals for Efficient PCB Layout

    I use a 200 MHz oscillator with an LVDS output for the input clock of the LTC6954. For efficient PCB layout, I would prefer to invert the LVDS signals (LVDS_P goes to In-, LVDS_N to In+).

    Is this possbile or may it lead to a degradation of the jitter…

  • Low-Frequency Programmable Clock Divider / Delay (Input < 10 kHz)

    Hi,

    I'm looking for a programmable IC that provides two delayed pulses of individual pulse length, triggered by a single input pulse (delay range and pulse length 1 µs - 100 µs). The maximum frequency of the input pulse is 10 kHz (square wave).…

  • LTC6947 REFin best format: CMOS, LVDS or LVPECL?

    Dear support,

    I need to interface the LTC6947 PLL REFin with the LTC6954 Clock Divider output. In particular, the LTC6954 provides for a 100MHz REFERENCE signal for the LTC6947.

    Since LTC6954 can provide 3 different format for the output signal, the question…

  • LTC6957 additive phase noise when the LTC input is square wave

    Hi,

             In the data sheet, the additve phase noise data for LTC6954 is based on the sine wave input. What if the square wave input? In addition, LTC6954 is a limiter,nonlinear products may produce. Does the square wave input go through the limiter still…

  • RE: Output impedance of the LTC6957-3

    Lukas,

    Based on these plots, it looks like the LTC6957 CMOS output has ~30-40 ohms resistance.  Some variation with temperature.

    On the eval board we had to plan for the CMOS signal going into a 50 ohm termination to ground.  However, on your board you…

  • Clock problem with ADCLK925 and AD9695/AD9739

    Hello

    I am using AD9695 and AD9739 with an ultrascale FPGA, on custom board.

    We have no problem with the design, until we load a high consumption bitsream into the FPGA.

    When the a full FPGA is loaded, the input clock (1280MHz) is no longer detected by…