• RE: LTC6268-10 parasitic capacitance

    Hello Mikhail,

    The methods described on pages 14 and 15 of the datasheet are already good techniques to reduce the parasitic capacitance. 

    In addition to these, you can also be guided by the capacitance relationship below:
    Capacitance ∝ [(Overlapping area of…

  • RE: LTC6268-10 1khz bandwith application

    Hi ,

    Sorry about the late reply!

    The Analog photodiode wizard tool computes the peak diode current, in the example you've attached, simply as the following assuming 100mW/m^2 Peak light intensity:

    https://tools.analog.com/en/photodiode/

      …

    • 使用LTC6268构建电压跟随器

      原理图如左图所示，需要实现一个小电流输入端的电压跟随器

      Rload在100kΩ左右，电流在100nA~10uA的范围；电路目的为在已知输入电流的情况下，测试负载的阻抗。

      第一次使用AD8606构建，结果如下，使用吉时利DAQ6510测试

      图中红色线条为理想情况，黑色线条为AD8606构成的跟随器测试情况。

      曲线不合推测为AD8606最低电压输出相对较高所致，如下：

      最低输出电压为40mV，与曲线最低电压基本一致。

      现在尝试用LTC6268来构建，但是并未在数据手册上找到相应的最低输出电压的参数…

    • LTC6268 input bias current vs. Temperature

      Hi,

      The graph provided for LTC6268 input bias current vs. temperature does not allow me to see values at temperatures below 50C. Is there a table I can get with the values shown in this graph? I need low bias current, but only up to 45 or 50C and the…

    • Which is an alternative to the LTC6268 for 10 V operation?

      Hi,

      I want to implement a simple peak detector with a precision diode. I am using the LTC6268-10 to implement the >10 MHz precision diode due to its low input capacitance. However, I would like to increase the voltage supply to +-5V. Thus, I am looking…

    • LTC6268 Bare Die Pad Layout

      Hello,

      For a research project I am working on I need to use the LTC6268-10 op-amp. In my project I need to reduce the parasitic capacitance as much as possible. As a result, I am trying to get bare-die of this op-amp and directly wirebond it to another…

    • 交流跨组应用中LTC6268-10运放自激

      请教一个运放自激问题。电路是一个交流跨阻放大器，运放使用LTC6268-10，单电源3.3V供电。采用电阻分压+跟随器生成中心参考电压。PIN的结电容是2pf，电路设计带宽是60MHz。但是测试时发现输出有9.5MHz左右的自激，想请教一下是电路设计问题？还是布线布局、寄生电容的原因？

      其中C5电容设计值是0.1pf，手头没有这种电容，所以实际测试时是开路，希望利用寄生电容来产生0.1pf。C5用1pf时没有自激，但是带宽不够。

      R3用过0R电阻，同样有自激。

    • RE: LTC6268-10

      I am not sure about the JFET and TIA, but you need to pay much attention about the consistency of the 2 photodiodes when designing balanced detector. the balanced detector is used a lot in interferometer receivers that the 2 PDs will cancel out the DC…

    • RE: LTC6268-10: Input Capacitance & Input Bias Current in LTspice

      Hi! Thank you so much, you're right, I didn't correctly consider the input impedance; that explains the distortion for high-impedance sources. Sorry the late reply

    • LTC6268-10 feedback capacitance mitigation with single supply

      Hello,

      I'm designing a transimpedance amplifier based on LTC6268-10 amplifier.
      I read through the documentation and I saw the DC2414A design files, so I understand that to lower the parasitic capacitance of the feedback resistor placing a ground trace…