• POE LTC4271

    Hi team

    This is a question about LTC4271.
    There is a register description in the datasheet as shown below.

    https://www.analog.com/media/en/technical-documentation/data-sheets/429071fb.pdf

    Register Description
    For information on serial bus usage and device…

  • LTC4271 programming.

    Hi, where can I found the LTC4271's registers documentation?

    Best regards.

    I have not found anything on your site.

    Please help!

  • LTC4271 Date Code

    Hello,

    We have some LTC4271 parts with date code 1209.

    What is the date code format for these parts? YYWW or WWYY or yet another format?

    Kind regards

    HAns

  • LTC4271 Detection Status Bits

    LTC4271 Software Interface文件中,

    針對Port Status的描述中,

    其Table3的[2:0=7]描述和Register map的描述是不一樣的.

    請教在detect bit為 111 (7) 的時候,正確的結果是什麼呢?

    謝謝.

  • Enquiry related LTC4271/ LTC4290 PSE controller

    Hi

    We are planning to use 8 port LTC4271/LT4290 PSE controller in our embedded video recorder.

    Will you please suggest how much current is required? Also please explain why negative VEE is required for this chip?

    Can't we provide positive 48V to LTC4290…

  • RE: POE LTC4271/LTC4290 -SR-70860-Q5B2L

    Hi Eric,

    We are testing our PSE design  valid PD board (this board is tested with different PSE devices) with LTC4278 and LTC4294.

    Our PSE   chipset is LTC4290B

     

    Best Regards

    Süleyman

     

    Kimden: EHorsma 

    Tarih: Monday, June 18, 2018 8:15 PM

    Kime…

  • RE: LTC4266 Fault Delay time issue

    ADI PoE PSE software files are available for request on Analog’s Software Request Form (http://analog.com/srf).  Fill in the Software Recipient Information and Commercial Information.  In the Software Requested section, select Power over Ethernet…

  • RE: LTC4270 Current Limits in stand alone mode?

    In AUTO pin high mode, the XIO1/0 pins set the maximum LTPoE++ power level (38.7W, 52.7W, 70W, 90W) the LTC4270/LTC4271 will automatically power up.  See Table 1 of the datasheet.  In this mode, currents are automatically set to insure the PD receives its…

  • RE: Does ADI PSE support LLDP protocol for classification

    Hi Ken,

    A PSE, referring to the entire device or switch, may declare the availability of high power by performing a multiple-event Physical Layer Classification using voltage pulses, or with Data Link Layer Classification (DLL), using data packets. PSE…

  • RE: LTC4290 design and the IEEE 802.3bt compatibility

    The LTC4291-1/LTC4292 chipset is specifically for IEEE 802.3bt 4-pair power.  In this system, 2 power channels drive the 4 Ethernet pairs. A properly implemented LTPoE++ PSE will have a single power channel driving the 4 pairs.  These are two different implementations…