• RE: About voltage of external regulator at ADAU1452W

    There is a supply sequencing issue if we try to use 1.8 V for the external PNP while IOVDD = 3.3 V.

    For either start-up or power-down, if the 1.8 V supply is up while the 3.3 V supply is down at ground, then the external PNP acts as a switch, passing…

  • LT1618 - Wide input range with a fixed 3.3V output


    Is it possible to have a single circuit with the LT1618 that outputs 3.3V with an input range of 1.8-18V?


  • Device that is capable of translating i/o level of 1.8/3.3v to 3.3v.


    I'm looking for a device that is capable of translating 1.8/3.3v to 3.3v.

    The problem is, the circuit should be able to determine the i/o level and choose the supply voltage for translation.

  • LT1764-1.8 has the same input and output


        I design a 1.8V power supply module with LT1764-1.8, and the input voltage is 12V.

       The VIN pin and SHDN pin are connected together and they share a 10uF Capacitance.

       The OUT and SENSE  are connected together and they share a 10uF Capacitance.


  • ADM7150ARDZ-1.8 produce 2.8V instead of 1.8V ??  WTF?

    Using several of these parts on a board.  6 out of 10 are producing 2.8V instead of 1.8V.

    Yes I have verified the correct part is installed.  Each of the circuits are identical except for the load.

    Need help ASAP!

  • RE: AD9106/AD9102 clock issue

    I ended up using an LVDS clock (IDT ICS844021-01 at 166.66 MHz) and powering the AD9106 at 1.8 V. This seems to work well.

    When I was powering the AD9106 at 3.3 V, CLDO was ~1.4 V, which seemed bad. Now, when powering the chip at 1.8 V, CLDO correctly…

  • RE: AD971X Digital Specifications at 1.8V

    Here is the input specs

    For 1.8v supllies DVDDIO=1.8and CVDD=1.8

    ViL   0.5v max

    ViH  1.2v min

    For both data and the DCLKIO and CLKIN

    1.8 V Q Channel or DCLKIO Falling Edge

    Setup 0.25 ns

    Hold 1.2ns

    • 1.8 V I Channel or DCLKIO Rising Edge


  • RE: ADV7391 Vddio question

    I was able to find Datasheet Page 8, DIGITAL INPUT/OUTPUT SPECIFICATIONS—1.8 V

    "When VDD_IO is set to 1.8 V, all the digital video inputs and control inputs,
    such as I2C, HS, and VS, should use 1.8 V levels."

    I am assuming this means when VDD_IO…

  • RE: 1800 MHz and 900 MHz synchronously generation by AD9520-3 internal VCO

    Hi nealw,

    Could please you clarify following?

    AD9520-3 contains a table below.

    So provided earlier mode is not valid for the AD9520-3.

    Only way to generate 1.8 GHz and 0.9 GHz is using VCO direct to output for 1.8 GHz and one of dividers for 0.9…

  • RE: Regarding use of TCXO in ADRV9361-Z7035

    Dear sir,

    Thank you for your response.

    for 40 MHz TCXO, from bank 34 , rakon TCXO enabled through IO_00_34_AD9361_CLKSEL( this bank voltage range is 1.2-1.8 V), one option is to remove LDO (which is used for rakon TCXO ADM7160) , and provide direct 3…