• LTC2512-24 开发

    有谁开发过这款芯片?目前调试的现象是22位的no latency output 有输出,但24位的滤波结果没有输出。MCLK=1Msps,DF=4,每个转换周期都有busy信号,drl信号每隔85ms周期被拉高一次(与手册描述的每隔DF个转换周期拉高一次不相符),在drl信号下降沿后给scka信号,并没有数据从sdoa引脚输出。驱动时序已经按照手册要求写的,并有检查无误。

  • ADC LTC2512-24 Driver Inquiry

    In ADC LTC2512-24 datasheet, LT6202 is recommended to be used as ADC driver. But in "Precision ADC Driver Tool - BETA", there is no option to use LT6202 in driver selection (only LT6200 available). In this ADC driver tool,  ADA4807-2 seems to…

  • Why is the LTC2512-24 output delayed?

    1. I use the LTC2512-24 digital filter to output SDOA, and the sampling data has a delay;
    2. According to the manual, use SDOB without delay output, but there is still delay in sampling data.
    Thanks Reply!

  • Passband ripple of the LTC2380-24?

    I am considering both the LTC2512-24 wideband FIR filter SAR and LTC2380-24 narrowband SINC1 SAR for a design which is to have both good AC as well as DC specs.  What is the passband ripple of the LTC2380-24?

  • RE: LTC2512 - ADC not updating the output register in single shot read

    If you look at Figure 22 on page 25 of the LTC2512-24 data sheet you will see that a total of 35 cycles are required for full settling of the filter. This is fixed in this device and cannot be changed.

  • Why does the LTC2512-24 only work for a while?

    Hello, I applied LTC2512-24 design acquisition circuit, FPGA driver chip, DF=4, MCLK=1MHz, SDOA output, but the chip can only work for a while at a time, need to restart the power to work again, but also work for a while。

  • RE: Why Ltc2512-24 has BUSY signal, no DRL signal

    我也遇见同样的问题,你后面是怎样处理的?

    Google Translation:

    I also met the same question. How did you deal with it later?

    Please note that this version of the EZ site should use English only in all posts and responses.  Thanks

  • RE: LTC2512 Timing Specification

    tDRLLH, tBUSYLH, tDSDOA and tDSDOADRLL will not change with clock frequency.

    The specifications for the ADC Timing Characteristics Table are:

    VDD= 2.5V, OVDD= 2.5V, REF = 5V, VCM= 2.5V, fSMPL= 1.6MHz, DF = 4.
  • 请教下关于LTC2512-24芯片输出延时问题!!!

    各位有没有用过LTC2512-24这款ADC芯片,根据手册介绍,SDOA输出是滤波输出,有延时,后来用了无延时的SDOB输出,但是数据还有延时,请教下是啥原因啊?

    ADC驱动用的FPGA实现的,严格按照手册时序写的代码。

    感谢!!!

  • 24-bit RGB to CVBS

    Hi there,
    I am looking for simplified 24-bit RGB to CVBS encoder IC in ANALOG DEVICES product line.
    Could you suggest one preferably that has EVAL board with a detailed instructions.

    My input signal is sourced from DVI receiver TI TFP401