2011-03-16 09:59:16 [PATCH] FIX: add return to probe ADAU1761 correctly
Matteo Fortini (ITALY)
I guess noone tested it on a real board... shame!
2009-06-02 16:39:16 ifconfig build and runtime issues on cm-bf537e.
Tim Shearer (UNITED STATES)
I'm porting a project from an older 2009R1 pre release (about a month old) to the current one in trunk. I've hit a couple of…
The only spec given for SDO with respect to CLKOUT is the valid delay between CLKOUT falling and SDO remaining valid. This spec has a min of 0ns and a max of 1.5ns.
FMC231, FMC Quad ADC 16-bit @ 1 GSPS and Quad DAC 16-bit @ 2.8 GSPS
2008-04-16 16:15:57 Using ULPI to build a Blackfin based USB controller?
Anders Marten (SWEDEN)
Hi, I am a novise in this area. But in my struggle to lower the cost of my Blackfin based design I have stumbled over the ULPI specification…
We have an application that will require 4 channels with a good dynamic range. Using 2 of the AD9652 converters looks appealing with it's features. Our RF signal is a mix RF signals 100 MHz and less, we will start with <20 MHz. Running the AD9652…
2010-08-16 16:52:13 What are the different u-boot images in the distribution?
Patrick Doyle (UNITED STATES)
I note that the tarball for the bf518 board contains 5 files:
Yes, this is the recommended connection scheme for the secondary. Figure 11b shows the recommended cell connections for the top IC with 4 cells.
2008-10-16 08:16:46 编译出错，宏没有定义，CPU：BF531
Jun Ai (CHINA)
drivers/i2c/busses/i2c-bfin-twi.c:112: 错误：‘XMTSERV’ 未声明 (在此函数内第一次使用)
Dear Technical Support Team,
Is there relationship between SCLK frequency and sampling rate?
According to the datasheet, 60MHz(VDRIVE > 2.7 V) is the max frequency.
My microcontroller is max 16MHz for SCLK.
My target is over 200ksps and 8ch simultaneous…