• HMC988

    I purchased the HMC988LP3E chip and soldered the circuit board by myself, following the picture of the evaluation board provided by your company. Given input, no output can be measured. In the DATASHEET of chip HMC988LP3E, default THE DEVISION ratio…

  • HMC988 Power On State

    I have an application where I need the output stage of an HMC988 to not drive until enabled. From the datasheet, the LVPECL output is enabled by default on power-on reset (Reg 01h[3]). However, from figure 5  (SYNC/SLIP Circuit Diagram) it appears that…

  • HMC988 Input Waveform

    Does the HMC988 only accept square wave inputs? Can I use a sine wave as an input? 

    Thanks in advance.

  • HMC835 HMC1034 HMC988

    Hello,

    Could you please tell me the differances between the HMC835 and HMC1034 and why one should be chosen over the other? The data sheets appear to have very similar specs, but the price of the HMC1034 is almost double. Also I plan to use either the…

  • Hmc988 low frequency spurs

    hi, we have a small independent board with Hmc988 on it, which is programmed by Arduino. The input power is 0-6dBm on 50Ohm input, AC coupled which is within spec. The part programs fine but we see ~180KHz (and harmonics) spurs at the divided output …

  • HMC988 Input DC Bias

    In the HMC988 datasheet page 17, "HMC988LP3E Input Stage" it states

    The DC bias level of 2.0 V can be generated internally by
    programming Reg04h[3] = 1, supplied externally, or generated via an LVPECL termination network inside the part.
    When…

  • HMC988 quad driven by HMC987

    Hello, I need to drive a 4 GHz clock from one HMC987 to four HMC988 running in parallel.  Each HMC988 then outputs a 1 GHz clock signal.

    Question: How can I trigger the four HMC988 to be phase aligned?

    Also, how should I write to the SPI buses from a laptop…

  • HMC988 Jitter Density unit

    Hi

    I'd like to know what asec/√Hz is. We can see the unit in Table1 Jitter density on HMC988LP3E Data Sheet.

    Regards,

    Hiroyuki

  • HMC988 Duty Cycle affected by Divide-By Selection?

    Hello,

    I  have a requirement where I'd like to use the HMC988.  My requirement will require for me to modify an input clock via a Divide-By factor to produce a new output clock.

    For my clocking requirement, the output clock must maintain a 50% duty…

  • Hmc988 Clodck divider and Hmc835 PLL running hot

    Hi,

    I have an integrated board, that contains both parts. The 3.3V rail of the PLL is generated off-chip, as recommended using Hmc1060 LDO regulator. Both parts are laid out above complete ground plane with thermal vias.

    The divider works at 1/8 and…