• hmc838 phase noise and loop filter BW

    The loop filter's BW is so strange on my HMC838 board, The BW gets so large at lower frequency(1.62GHz) and get smaller at high frequency(1.67Ghz). and also the phase noise get worse at low frequency, and actually it is not good enough at high frequency…

  • ADISIMPLL不支持HMC838

    使用PLL芯片HMC838进行电路设计,在ADIsimPLL中找不到该芯片,请问环路滤波器等参数应该如何设计?

  • HMC838 环路带宽和相位噪声问题

    HMC838 调试过程中发现低频率段的相位噪声很差,并且环路带宽变得很宽,而高频率段相位噪声相对较好,环路带宽和设计带宽接近。调整了电流泵的大小,稍微可以改善带内噪声,但是高低频率的环路带宽差异没明显改善。请问可能的问题在什么地方?PFD:19.2MHz(1.25Vpp),小数分频模式,Fout,1.6~1.7GHz。环路带宽:50KHz,使用了Hittite PLL simulation tools 设计了4阶环路滤波器。 附图

  • HMC838芯片,参考时钟输入的问题

    您好。

    HMC838的datasheet里写到,其ref input range是1~3.3Vpp,应50欧姆匹配。而常用的参考时钟是TCXO,其输出特性大多是在10k//10pF的负载下给出。。

    请问,使用TCXO当作HMC838的参考时钟时,是不是应该在TCXO和HMC838之间加一个缓冲放大器?如果是,那么可否使用一个反向器。ADI是否有相应的参考,或推荐的放大电路?

    谢谢。

  • TAGS LIST: Clock and Timing

    LTC6953
    LTC6955
    LTC6957-1
    HMC6832
    HMC7043
    LTC6950
    LTC6954
    HMC987
    AD9576
    AD9508
    HMC1035
    HMC988
    HMC1033
    HMC1034
    HMC1032
    HMC1031
    ADN4670
    ADCLK944
    ADCLK950
    ADCLK948
    ADCLK846
    ADCLK954
    ADCLK946
    ADCLK854
    AD…
  • Frequency Hopping with Hittite PLLVCO's

    This application note describes how to implement a manual VCO calibration to achieve the fastest settling time with Hittite PLLVCO products.

  • Hmc829 isolation between analog and digital inside the chip

    Hello,

    I'm using HMC829 RF PLL evaluation board I run the configuration from examples that Hittite provided,

    at the RF output I see some spurious at different places that running through small band =1MhZ when I click on read lock register(12h) with…

  • Recommended regulators for ADI PLLs and VCOs

    PLL Recommended regulator
    Low power standalone PLLs and the ADF4360-x narrowband PLL/VCO family (< 100 mA); e.g. ADF41xx, ADF42xx, ADF4360-x

    Use the ADP150 regulator; good performance, low cost.

    Use…

  • 'Must Knows' about ADI's family of Hittite PLL+VCO and Clock Timing products

    The attached FAQ document provides additional information on the use of the PLL+VCO and Clock Timing family of products.  Specifically,

    the applicable products are:

    HMC820LP6CE             HMC821LP6CE             HMC822LP6CE             HMC824LP6CE             HMC826LP6CE

    HMC828LP6CE             HMC829LP6GE             HM…

  • How do I use the SPI Mode Selection feature on HMC PLL's & PLLVCO's?

    This note discusses best practices for use of the Serial Port Interface (SPI) Mode selection feature of HMC PLL and PLLVCO product lines.