• HMC7044

    I found that with my configuration program below, the input reference clock coming in via CLKIN1 is not necessarily related to the clock coming out via CLKOUT0. For example, when my input reference clock increases by 10Hz on the basis of 10M, my output…

  • HMC7044-Noise Floor Calculation

    Hello ADI Team,

    I am using HMC7044 in my design.

    I saw the the Noise Floor Specification at 2457.6MHz is −156 dBc/Hz.

    I calculated the Noise Floor by using following formula (eqn 5 in datasheet)

    I have taken the following assumptions.

    Floor_FOM…

  • Why are the filter parameters in the HMC7044 data sheet different from those in the EVAL-HMC7044 schematic ?

    Hi,I find the PDF1 frequency and PFD2 frequency  in HMC7044 data sheet and EVAL-HMC7044 data sheet is the same value,why their filter is different?

  • Reading Register value from HMC7044

    How to read Register values from HMC7044?

    Which register to set as General purpose Output pin to read register value?

    I am setting register 0x53  = 0x5 (to SDATA from SPI communication).

    what is the spi sequence to request register value.

    I am doing the…

  • question about hmc7044

    There are 1 hmc7044 and 2 adrv9009 in the self-made board, realizing 4 channels of reception in total; We need two boards in cascade to realize 8-channel reception, and 8-channel reception requires phase synchronization function; My implementation idea…

  • Behavior at high temperature about HMC7044

    Hi.

    I have a question about the high temperature for the HMC7044. 

    When the surface temperature test on the IC, observed in which the temperature dropped sharply around 60 ° C.

    Looking at the datasheet, I could not find any description about this.

  • HMC7044

    HMC7044出来的时钟有抖动现象,使用频谱仪观察出来的时钟信号,看都时钟信号在一定范围内左右移动

  • HMC7044 PLL2 can not work correctly

    hello,

           now I made a test board for HMC7044, I design it reference to EVAL-HMC7044 and ad9172-fmc-ebz_revc_schematic, my schematic is showed below:

    CLKIN0 is 100MHz, VCXO is CVHD-950X-100.000, I want to use this to produce 1.6GHz at CLKOUT0 and SCLK…

  • Custom board ADRV9009 Driver HMC7044 clock kernel panic: could not get #clock-cells for /axi/spi@e0006000/hmc7044@0

    Hello, working on a project with ADRV9009. Here is my dts files :

    /dts-v1/;
    #include "system-user.dtsi"
    
    &axi_adrv9009_core_tx {
    	plddrbypass-gpios = <&gpio0 114 0>;
    };
    
    #include <dt-bindings/iio/adc/adi,adrv9009.h>
    
    &trx0_adrv9009 {
    
    	reset…