• HMC624A SW1/2 P/N Brand

    Hi Sir,

    My customer want to know the P/N of SW1 and SW2 in " HMC624A: 0.1 GHz to 6.0 GHz,0.5 dB LSB, 6-Bit, GaAs Digital Attenuator Data Sheet (Rev. B)". 

    Page 14

    https://www.analog.com/media/en/technical-documentation/data-sheets/hmc624a.p…

  • ABSOLUTE MAXIMUM RATINGS of HMC624A

    ABSOLUTE MAXIMUM RATINGS of HMC624A is listed with 25dBm@VDD 3V or 28dBm@VDD 5V by the catalogue.
    However, P0.1dB is listed with 33dBm@VDD 3V or 27dBm@VDD 5V.
    Will it be to guarantee that saturation is not caused to ABSOLUTE MAXIMUM RATINGS?

  • HMC624A

    I would like to have definition of the Return Loss Input and Output parameter for the variable attenuator.

    I have also another question:

    The spec for P0.1dB at VDD= 3V, over temperature and frequency is better than 33dBm in table 1,

    but it looks much worse…

  • RE: HMC624A parallel mode

    When the part is used in parallel mode, we don’t prefer to leave unused pins such as SERIN/CLK floating. Instead, SERIN and CLK could be pulled down to ground so that they have a defined voltage.

  • RE: HMC624A Direct Parallel Mode

    When the part is used in parallel mode, we don’t prefer to leave unused pins such as SERIN/CLK floating. Instead, SERIN and CLK could be pulled down to ground so that they have a defined voltage.

  • RE: HMC624A Attenuation Step Problem

    Hi hkumar,

    We tryed resoldering defected ICs. It had no effect. Only replacement helped. Statistics are weak: 9 pcs of about several hundrends per year and only during august. We hadn't detected ani problem during last 2 months. So it's not a prob…

  • HMC624A Digital Control Input Voltage

    The results from a board level simulation of a 2MHz clock on the CLK pin of the HMC624a are showing falling edge undershoots of around -725mV. The duration of the undershoot is about 14ns between 0V crossings. I have a few questions about this:

    • Will…
  • HMC624A attenuator power up for direct parallel mode problem

    This circuit is powered up by VCCRXMIX=4.5V with Dx=0V. After 100us I set Dx into desired state. Dx levels is 3.3V CMOS.

    But I see -30dB attenuation after power up within ~5ms independent of Dx levels. After 5ms attenuation becomes normal.

    What am I doing…

  • HMC624A IP2 data and operation from 20 to 6000MHz

    Hi,

    We are planning to use your Digital attenuator  part: HMC624ALP4E for our frequency range of 20 to 6000MHz.

    1. What are all the limitation of DA from 20 to 100MHz? Is there any way to improve the performance in this range?

    2. In datasheet only IP3…

  • Can the HMC624A be used down to 10MHz with appropriate AGCx caps?

    Using the HMC624A for an application that requires a very wide BW (down to 10MHz, up to 5GHz).

    Can the AGCx caps be increased to 10nF, or will this cause other problems / transient damage during turn-on / turn-off?

    regards,

    L