Hi there,

Please reference the EZ post below. The documents referred apply to all HMC PFD / INT PLL products including the HMC439, HMC440, HMC3716, HMC4069, HMC698 and HMC699.

https://ez.analog.com/message/286275?q=PFD

Best Regards,

Marty

Hi Mustafa,

The alternatives to the HMC440, which include LD, INV, and internal 200 ohm pull ups would be the HMC4069, HMC698, HMC699.  Each one has similar performance, just different divide ratios, so pick the one that suits your application.

Best…

The HMC3716 is specified at a maximum VCO and REF frequency of 1300MHz. While it will work a little higher in frequency the absolute maximum for any given device will vary due to process. This will also vary with supply and temperature somewhat. You might…

Hi Peter,

Can you send along a block diagram of your implementation?

Be careful loading down the NU/ND ports, as these are intended to drive a high impedance load (diff amplifier).  If these outputs are loaded down below 2.5V, then the internal output…

Hi Paul, 

Essentially you need a fractional PLL with phase adjust that can operate down to 13 MHz and the ability to operate at N=1. I'm not aware of a PLL product in our portfolio that can meet all of those requirements. 

Solutions that integrate phase…

Hi there,

Great question. The REF and VCO inputs to the PFD are primarily be concerned with the slew rate of the rising edge of your waveform. This becomes increasingly important at low frequencies (e.g. 10MHz).  In most cases, a 50% duty cycle will be…

Hi Javier, 

Sorry to hear your having difficulty getting the HMC699 to lock. 

I reviewed your schematic and the loop filter design, VCO input drive level and chip logic appear to be fine. I noticed that you are using a 20 MHz reference that utilizes an…