• RE: HMC983 and HMC3716 PLL design ?


    For a general description of MASH I would direct you to this paper

    To summarise:

    The number after MASH (e.g. MASH1, MASH11, MASH111) refers to the order of modulator. The SDM mode A is equal to fourth order (MASH1111).

    I do not know why the decision…

  • RE: HMC3716 input sensitivity


    The min/max sensitivity from the spec table is best to follow since these numbers have been measured and verified at test. But yes the min/max spec in the datasheet applies to the full frequency range, and as a rule of thumb the min sensitivity of…

  • [HMC3716]

    I have a simple question:

    If the frequencie of the input and the LO are diferent, how will the output voltage be? Is the one port sent out a votage meant the difference and the other sent out the phase difference? or what?


  • HMC3716 inputs

    The HMC3716 data sheet shows differential inputs with a 50 ohm differential load. Also, it shows the NREF and NVCO ports being tied to the internal bias networks.

    Must the NREF and NVCO ports be bypassed, or can the REF/NREF amd VCO/NVCO inputs be driven…

  • HMC3716 loop filter question

    Hi everyone, I have some questions about the loop filter as shown in the page 9 of the HMC3716  datasheet:

    - What is the level of NU and ND at locked state? 3V or 5V?

    - Since NU and ND can swing between 3 and 5V, so the Vtune would have the same swing…

  • HMC3716 unpowered input

    If HMC3716 is unpowered but a single ended input is present at REF, can that damage the part?

  • HMC984, HMC3716 and SimPLL

    Does the latest version of SimPLL include models for Hittite phase detector HMC984, or HMC3716 and others. If not, when will they be supported? 

  • HMC3716 loop filter recommendation

    Dear Sir

    Please could you recommend an op amp and loop filter for an HMC3716 with a VCO operating near the maximum frequency of 1.3GHz, tuned for best integrated phase noise? Phase noise of the VCO is approximately:



  • HMC3716 PFD in adiSimPLL

    How can I simulate a PLL loop with the HMC3716 phase/freq detector in adiSimPLL? The part is not in the chip library. Alternatively, could I define a custom phase detector? I need only phase noise freq analysis, not loop settling in time domain etc, so…

  • HMC439 and HMC3716 spice models

    Dear RF experts,

    I would need spice models of the PFD chips HMC439 and 3716 to simulate transient behavior of my wideband PLL, including nonlinearities from loop filter and VCO. Do you happen to have these models available?

    Many thanks and regards,