• HMC1031

    I'm using the HMC1031 to lock a Crystek CVHD-950 100MHz VCXO to a 10MHz OCXO and it all works great, including the lock detect output.

    In a new product I'm using the same circuit to lock a TVLD410 100MHz Connor Winfield VCTCXO to an optional 10MHz…

  • HMC1031 with no REFIN


    Hello,

    I would like to verify what the HMC1031's behavior is when the REFIN signal is absent, e.g., what happens to the charge pump output? Will it just sit at the low rail? Thanks.

    Best Regards.

  • LTC6952 and HMC1031 simulation

    Hello,

    How can I simulate a design based on LTC6952 possibly with an HMC1031 as a reference jitter cleaner? Why are they not available in ADIsimCLK?

    Thanks,
    /Mikhail

  • HMC1031 LKDOP Output

    I am unclear on the output polarity of LKDOP on the HMC1031 - I presumed active high indicates the PLL is locked, but now I am uncertain. Can you clarify?

    Thank you.

  • HMC1031 with active filter in simulator

    I am trying to use the HMC1031 with a VCXO that has a 0-8V tuning voltage. So I need to use an active filter. The PLL Simulator software shows several inverting active loop filter designs, Active A, B, and C. yet none of these will work with the HMC1031…

  • HMC1031- rise and Fall time

    Using a HMC1031 in a 10 MHz PLL. I have the option of inputting a 3.3 vdc logic signal or a 10 MHz sine. I seem to be stuck with the charge pump only providing  positive current. The cap charges to the rail and will not come down even when the frequency…

  • HMC1031 Not locking to 100MHz

    Hello Analog,

    We have bought HMC1031 EVM and tested.

    With onboard VCXO and loop filter value we got 50MHz locked vco output.

    But our application need 100 MHz VCO output.

    So we replaced on board VCXO with CVHD-950X-100 MHz VCXO. But we did not get any…

  • ADF4371 20dB Phase Noise hit at 100Hz Foffset

    Hi ADI,

    I have an eval for the ADF4371 and I'm using an HMC1031 eval to lock the 100MHz ref to a precision 10MHz OCXO.  I am generating an 18GHz LO.  As seen here:

    The problem here is measured PN at 100Hz offset.  With the on-board crystal reference…

  • RE: HMC833 Tuning Frequency Offset

    The evaluation board has an on-board 50MHz VCXO and synchronizing PLL, HMC1031.  When the HMC1031 is unlocked, the VCXO will be 'off frequency' by many kHz which gets multiplied up by the N value of the VCO divider.  To eliminate this frequency…

  • RE: Easy to use Jitter Attenuator, Reference Cleanup loop examples?

    The HMC1031 is an excellent choice.  It has a 2 pin parallel programming interface.  No SPI programming is required.  In terms of size and ease of use, it is truly unique as most(if not all other) low power PLLs require SPI programming in the industry.