• HMC1031

    I'm using the HMC1031 to lock a Crystek CVHD-950 100MHz VCXO to a 10MHz OCXO and it all works great, including the lock detect output.

    In a new product I'm using the same circuit to lock a TVLD410 100MHz Connor Winfield VCTCXO to an optional 10MHz…

  • RE: HMC833 Tuning Frequency Offset

    ur reply is really helpful. I have a question here. In this test condition " If i gave a 10 MHZ refe input to the REF in (pin 2) of HMC1031 and set the switches, SW1 for HMC1031 divide-by-5.  and  use the 50MHz VCXO  what will be the output of HMC1031…

  • HMC1031 with no REFIN


    I would like to verify what the HMC1031's behavior is when the REFIN signal is absent, e.g., what happens to the charge pump output? Will it just sit at the low rail? Thanks.

    Best Regards.

  • HMC83x PLL+VCO Evaluation Board Drift

    HMC829, HMC830, HMC832, HMC832A, HMC833, HMC834, HMC835, HMC983/984, HMC1033, HMC1034

    The above HMC PLL+VCO Eval board offers the user flexible reference signal sources.


    Mode 1.

    Lab equipment 10MHz output phase locked to HMC DUT Eval Board.

    These boards…

  • RE: HMC1031 LKDOP Output

    That is correct.  When LKDOP is high (3.3V) the part is locked.  This part is susceptible to false out-of-lock indications (LKDOP=low but the part is actually locked) due to excessive leakage currents on the charge pump output pin.  See the lock detector…

  • RE: Jitter cleaning a non 50% duty pulse

    I think you could use the HMC1031 and a VCXO as a clock cleaner to replace the SMA input in figure above with the D flip flop.  The resistors may need to be adjusted depending on what sort of output the VCXO has.  For instance if the VCXO has a CMOS output…

  • LTC6952 and HMC1031 simulation


    How can I simulate a design based on LTC6952 possibly with an HMC1031 as a reference jitter cleaner? Why are they not available in ADIsimCLK?


  • RE: HMC1031 Not locking to 100MHz

    Hi Pradeep,

    I'm guessing that by 'R5' you are referring to the resistor in the evaluation schematic shown in the datasheet. To eliminate any further confusion on my part, please provide either your schematic or a red-lined version of the evaluation board…

  • HMC1031- rise and Fall time

    Using a HMC1031 in a 10 MHz PLL. I have the option of inputting a 3.3 vdc logic signal or a 10 MHz sine. I seem to be stuck with the charge pump only providing  positive current. The cap charges to the rail and will not come down even when the frequency…

  • HMC1031 with active filter in simulator

    I am trying to use the HMC1031 with a VCXO that has a 0-8V tuning voltage. So I need to use an active filter. The PLL Simulator software shows several inverting active loop filter designs, Active A, B, and C. yet none of these will work with the HMC1031…