As I understand, the ADuM3471 is only delaying the clock edges by the propagation delay, it doesn't reduce the clock speed. What happens is that there is a delay going into the ADuM3471 for the clock and then another delay from SDO going into…
Our customer asked as following question.
Why does your table-18 of datasheet ADuM3471 show a coil JA4631-Bl (1:2 turns ratio) for Fig-38?
We will make VDD1=5V and Viso=15V.
If so, we should choice a coil JA4650-Bl(1:3 turns ratio…
Please advise on what is required to enable a system with a very low total standby power.
Our customer is making progress in creating a demo using ADUM3471 .
In reading through the documentation and checking out the hardware, I…
I am working on this CftL project which includes ADuM3471 as my isolator. Due to time constraints, i would like to ask for your help if you can provide me a design support for the eval board EVAL-ADuM3471EBZ.
i would like to review the schematic…
The ADuM3471 will provide 4 channels of digital isolation and has an integrated transformer driver and isolated PWM controller to provide up to 2W of output power at 5V in to 5V out. There is a reference design that includes a BOM with transformer, diodes…
Sometimes if you don’t choose the correct L and C to filter the load current or if the feedback is not compensated correctly, the switching regulator feedback loop can become unstable. Maybe if you used a switching controller that had the feedback built…
we use ADuM3471 in a isolating design to interface a DAC to the CPU and generate the needed 12V for the analogue output circuit.
Our implementation is like the reference design (datasheet, Fig.38).
VDD1 ( 5V ) is connected to ADuM (VDDA) and…