• ADuM3471

    I will use the ADuM3471 in a new design. Can I use the output VOD to monitoring
    the voltage VISO? If there is a problem with the transformer then I have no
    VISO (VDD2 unpowered), what is the state of VOD?

     

    If VDD2 is 0V because VISO…
  • ADuM3471 Design Support package

    Hi,

    I am working on this CftL project which includes ADuM3471 as my isolator.  Due to time constraints, i would like to ask for your help if you can provide me a design support for the eval board EVAL-ADuM3471EBZ.

    i would like to review the schematic…

  • ADuM3471, light load question.

    Hello,

    Please advise on what is required to enable a system with a very low total standby power.

    Our customer is making progress in creating a demo using ADUM3471 .

    He writes:

    In reading through the documentation and checking out the hardware, I…

  • Question for ref. design of ADuM3471

    Dear Sir/Madam,

    Our customer asked as following question.

    Why does your table-18 of datasheet ADuM3471 show a coil JA4631-Bl (1:2 turns ratio) for Fig-38?

    We will make VDD1=5V and Viso=15V.

    If so, we should choice a coil JA4650-Bl(1:3 turns ratio…

  • ADuM3471: using primary power 3.3V AND 5V ?

    Hello,

    we use ADuM3471 in a isolating design to interface a DAC to the CPU and generate the needed 12V for the analogue output circuit.

    Our implementation is like the reference design (datasheet, Fig.38).

    VDD1 ( 5V ) is connected to ADuM (VDDA) and…

  • PWB design data for ADuM3471 and ADuM1300 EVALboards

    Dear SIr/Madam,

    Our customer put your ADuM3471 and ADuM1300 to their next product BOM.

    So do you have the Gaber data for PWB CAD design about EVAL-ADUM3471EBZ and EVAL-ADUMQSEBZ?

    I think that it become reference design for first time design customer…

  • how to use the adum3471 in dual supply mode

    The Eval pcb datasheet advises the use of a 1:5 ratio transformer when designing dual output (+15/-15V) outputs.

    With a 5V input, The transformer generates aprx 25V VPk in Open loop mode with a 5V input.

    When i follwed the instructions in the eval unit…

  • 关于ADuM3471在CN0292中的VDD2输入/输出配置

    在CN0292中,ADuM3471的pin18(VDD2)在原理图中默认连接到了外部LDO的输出端,但是在R13(0R)连到外部+15v的情况下,ADuM3471的VDD2此时应该是5VLDO的输出,而不是输入——至少相关的文档没有提到该如何选择是使用外部的LDO输入5v电压,还是使用ADuM3471的内部LDO在pin18上的输出5v电压。

    请ADI专家解疑一下。

    另外,由于-V_ISO是没有稳压调整的,不太清楚在后边的LDO稳压到5v的情况下会怎样的一个稳定状况。

    多谢!

  • RE: AD5422 register read-back bit-shifted wth 5.6MHz clock

    Hi Eugene,

    As I understand, the ADuM3471 is only delaying the clock edges by the propagation delay, it doesn't reduce the clock speed. What happens is that there is a delay going into the ADuM3471 for the clock and then another delay from SDO going into…

  • RE: Isolating a board from actuator and position sensors

    Sometimes if you don’t choose the correct L and C to filter the load current or if the feedback is not compensated correctly, the switching regulator feedback loop can become unstable.  Maybe if you used a switching controller that had the feedback built…