Blimp generates C codes to be compiled into MCU. The generated C codes always set the address of ADV8005 as 0x1A on I2C bus. "0x1A" is written explicitly and scattered thoughout the source codes.
What if the I2C address of ADV8005 must be 0x18…
I have a question about ADV8005.
Can ADV8005 change RGB888 24bits 3K82560×1600) 30fps to 3K(2560×1600) 60fps and output from HDMI using only one port?
I see the information ：We plan to design a new PCB for EVAL-ADV8005-SMZ and EVAL-ADV8005-SMZ-P in 2015. So ，where can i get the schematic diagram？
If I use the ADV8005 just as a HDMI phy chip to change video format from TTL to HDMI format ，is there a DDR2 needed to use？
Does the ADV8005 support H264 decoding/encoding,
Can someone help in following questions?
What is ADV8005 HDCP Compliance version ?
New HDMI License information,where can i get full license fee structure?
I have a question about ADV8005 TX, I set TX mode with DVI mode.
ADV8005 TX --> Sink(Monitor)
If sink already power on and ADV8005 Tx output signal, then sink can display correct DVI signal from ADV8005.
If sink is power off, and ADV8005 Tx…
Regarding to ADV8005, DS only describe Tjmax is 125℃, As TJ = TS + (ΨJT × WTOTAL), Customer want to know ΨJT of ADV8005 for further processing.
I am using the ADV8005 Evaluation board,
Input is Component 1080I 50Hz, when I fine tune the V freqency from 50Hz to 49.91Hz with my signal generator,
The HDMI receiver after ADV8005 HDMI out will get loss sync and display correct again, I think…
I want to know when does the ADV8005 need to set DPLL,
Now, my VSP input is use manual or auto mode config (use VID), my VSP output always use auto mode, then TX is using HDMI mode.
It can output correctly even I don't config the DPLL(pvsp_vid_clk_period…