• ADV7402 standard identification problem

    Good evening,

    I actually encounter problem with a projector who have an embedded ADV7402.

    I fed it with RGBHV (15.734 KHz H 60Hz V) from a video source in very low resolution (320 x 256).

    This source works fine in CVBS.

    in RGBHV it's like there is…

  • RE: ADV7401.  LLC clock is ~28MHz and should be 108MHz.

    The “:RGB 1280x1024 _@ 60 ADV7402  108.000MHz Out through DAC:” script was run for the ADV7401 on customer hardware ( NOT ADI EVB ) and produced a 28 MHz out. 

     

    Any suggestions for debugging the customer hardware?

     

  • RE: ADV7441A's FIELD output is not active

    Hi Kevil and Dave,

    Thanks for your timely reply and the document above.

    As the document mentioned,when connecting any CVBS/S-Video signal to ADV7441A,the IC can't output Field signal from Field/DE pin,just HS,VS and DE(from Field/DE pin),because these…

  • RE: ADV7403 Test Script for RGB (1024x768 @60Hz) to 24 bit RGB out

    I believe the following script (from ADV7403_ADV7403@_ADV7341-VER.1.3.txt) brings in 1024x768@60Hz and outputs digital RGB:

    ##CP XGA 1024x768##

    :RGB  1024x768 _@ 60 ADV7402 65.000MHz Out through DAC:

    42 05 02 ; Prim_Mode =010b for GR

    42 06 0C ; VID_STD…

  • RE: EVAL-ADV739XFEZ

    Hi Scott,

    I tested this with my eval board here. With the settings used in the SD autodetect script (in the'correct Answer' above) I was seeing an output pk-pk of 1.020V. Then using reister 0x0b or disabling Dacs 2 and 3 , I was able to get a compliant…

  • RGBHV IN to 30-bit RGB OUT

    Hello,

    Regard ADV7403

    Input Config:  Analog RGB form PC-Computer connected to ADV7403 on AIN1-Green AIN2 Blue AIN-3 Red Vsync to VS-IN, Hsync to HS_IN (All Other exactly as the EVB Schem)

    Config Prime Mode 010b GR VID_STD 1100b for 1024x768 _@ 60 (Exactlly…

  • ADV7403

    Hello,

    Regard ADV7403

    Input Config:  Analog RGB form PC-Computer connected to ADV7403 on AIN1-Green AIN2 Blue AIN-3 Red Vsync to VS-IN, Hsync to HS_IN (All Other exactly as the EVB Schem)

    Config Prime Mode 010b GR VID_STD 1100b for 1024x768 _@ 60 (Exactlly…

  • ADV7343 LOOP FILTER COMPONENTS

    According to ADV7343 datasheet, the external  loop filter looks like Fig. 92 (p.73).

    00c55e5c37945aa5d278fc47da2424e4.html

    The questions are;

    1.     What kinds of side-effect  would occurr if the 150nF capacitor value would be changed between -20% (120nF…

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