I have some questions of ADV7392.
Could you please support them?
(1) Software Reset function
When an user send the command of Software Reset, are any restrictions put onoperation?
For instance, in…
I am looking for IC which will generate video test pattern, the output format of test pattern shall be in HD-SDI format. can I get HD-SDI data format from ADV7392? if not can you suggest another IC which will do this( industrial temperature range)
I have a question about POWER SPECIFICATIONS of ADV7392.
There are descriptions about the current values on Table 12 on page 11 of the data sheet.I would like to know the maximum value for those for which only Typical values are listed.Could you tell…
Please refer below expert comment about macrovison register settings,
"These register settings can't released on the public forum. We need to know who the end customer is and if they are ROVI enabled. Once verified, then we can email or distribute…
I have a LCD (PD050LV1) that excepts RGB data at 800x525 (including syncs) for a frame size of 640x480. Obviously the LCD is progressive. Can I also input these signals to the ADV7392/3 which should give me a standard NTSC output?
I would like to interface the AVD7393 in RGB mode to a BF548. Is possible to do that?
I've noticed that the input clock is 27 Mhz but the data rate is 13,5 Mhz (one data is stretched for two clock pulses).
One possible solution can be to use a 27Mhz…
ADV7392 is configured to generate YC & CVBS outputs per recommended setting in datasheet Table 65.
Everything works great. However, the video output seems too bright and black background is dark gray instead.
Any simple recommendation to fix this…
I have a question about VBI and CGMS of ADV7392.
There is a description about VBI on datasheet page.52 as follows:"If VBI is disabled (Subaddress 0x31, Bit 4 for ED/HD; Subaddress 0x83, Bit 4 for SD), VBI data is not present at the output and…
I have a question about CGMS-A assignments of ADV7392.
There is a description about "CGMS CRC FUNCTIONALITY" on datasheet page.74 as follows:"If SD CGMS CRC (Subaddress 0x99, Bit 4) or ED/HD CGMS CRC (Subaddress 0x32, Bit 7) is enabled…
I have a question about ADV7390 and ADV7392.
Another(external) IC inputs SD progressive(720x480p@60Hz) to ADV7390/ADV7392 in digital parallel.
Is it possible to convert to interlace(720x480i@60Hz) with ADV7390/ADV7392 and output analog signals?