• ADV7343 Video issue

    Hi,

    I have my custom made ADV7343 board where iam giving 27MHZ clock input now i want the test pattern to be generated. This is our secon revision in first revision we had some problem but got resolved ( https://ez.analog.com/video/f/q-a/102379/adv7343…

  • ADV7611 interface to ADV7343

    Hi Team, 

    We are working on analog video conversion from HDMI input resolution of 1080p.

    In the previous design for Analog Conversion (CVBS and S-video), we have used FPGA because of the ADV7343 input config.  We need to downscale the resolution of about…

  • ADV7611 with ADV7343 Eval Kit specification

    Hi Team,

    we are working on HDMI 1080p60 to analog conversion of CVBS and Y/C, we have seen your evaluation kit of ADV7611.  

    Will you pls, Confirm the supported input resolution for that module?   

    Will you please refer to the Evaluation kit. https://ez.analog…

  • EXT_LF for ADV7343

    Hello,

    I have a question for external LOOP FILTER parts.

    Instead of 150nF, is it possible to use 100nF and 47nF parallelly at EXT_LF?

    Best Regards,

    S.O.

  • ADV7611 and Adv7343 resolutions

    Hi,

    I would like to design a HDMI to Analog video converter and planning to use ADV7611 and ADV7343 and a controller to configure 7611  and 7343, 

    Is it possible to give 1080P 60Hz HD (HDMI input) to adv7611  and convert them to YCbCr parallel data and directly…

  • adv7343 circuit questions

    Hi ADI's

    One of my customers is reviewing product development using the ADV7343.

    RS170 (640 x 480,30fps), 4 channels of black and white video are used in Black Bar mode.
    would like to implement the structure below.


     

    1. Should the DAC1 ~ 3 be directly…

  • ADV7343 with ZC702 video output issues

    Hi,

    We have designed a board using Zynq ZC702 from Xilinx and ADV7343 for analog video conversion. The data comes from a camera sensor which is interfaced to the Zynq platform via I2C. The incoming 16-bit parallel data is connected to ADV7343 for converting…

  • [ADV7343] External SYNC output pins in case of SD video.

    Hi,

    I have a question about ADV7343.

    It has some SYNC pins, which are S_HSYNC(I/O), S_VSYNC(I/O), P_HSYNC(I) and P_VSYNC(I).
    When ED/HD video is handled, I think we can use P_HSYNC and P_VSYNC for the external sync input and S_HSYNC and S_VSYNC for the…

  • ADV7343 output video not proper

    Hi,

    Iam using ADV7343 connected to FPGA to give analog video output.To test the connection with our design i generated the test pattern from ADV7343 and at first it was in black and white color then after correcting the input clock from 26.8 Mhz to proper…

  • How to find timing definition about Hsync of ADV7343 when using SD mode?

    Hi

    I want to use ADV7343 in my design.

    The mode is SD Only, 8-Bit, 4:2:2 YCrCb Pixel Input Mode to S[7:0],PAL or NTSC mode with R/G/B,CVBS/Y/C output.

    By the timing Figure 106 or 107 in datasheet, I could not find the detail timing  description with  S…