• Re: ADV7181C - Wrong PAL type detected

    Hi GuenterL,

    I will request you kindly look our issue where PAL N is detected instead of PAL BGHID. Also FSC lock is not happening many times. It looks that we are missing something in register settings. I have uploaded register settings along with the…

  • RE: ADV7181c


     To get 12bit ddr mode im going to change 6b register vlaue to 84.Is this is right?


    For advc7181c..h_sync,v_sync,fb,sog are connected to fpga,as these are all the input to adv7181c.

       These details are provided in section 7.11 in ADV7181D_Manual…

  • RE: ADV7181C - RGB to 422 EAV/SAV


    We have also the same case for input and output in ADV7181C, i.e. XGA(1024x768) input @60Hz and YUV422 (16 bit) out.

    We referred  ADV7401.txt.zip for the CSC registers settings and  RGB  1024x768 @ 60Hz to 12-Bit DDR out through HDMI script from the…

  • Changes Between the ADV7181B vs the ADV7181C

    I am an Arrow FAE and need assistance on ADC7181C Series.  My Customer has a product that transitioned from the ADV7181B to the ADV7181C.  There is a noticeable difference in the video image displayed between the Rev B and Rev C.  The Rev C looks washed…

  • Green magenta image problem in ADV7181C


    We are using ADV7181C decoder for VGA in and parallel out and interfacing with DM368. we wrote driver for the same. register values are as given: These registers settings for SVGA.

    	{TOK_WRITE, 0x05, 0x02},			
    	{TOK_WRITE, 0x06, 0x01},
  • ADV7181C Footprint

    We are making footprint for ADV7181CBSTZ-REEL device. We are referring your datasheet ADV7181C.pdf page no. 20 for the same. We are also referring ADV7181C_Evaluation_Board_RevB_Layout.pdf - page no. 2. The snapshot from layout is enclosed.

    Your layout…

  • ADV7181C tristate pin

    What to do with unused tristate pixel output pins in ADV7181C?

  • adv7181c video quality issue

    I am using the ADV7181C as I have asked many times before.

    I took the component input and made the RGB output. (cp mode)
    However, the image quality problem can not be solved.
    When the same IC receives the composite (CVBS) input and outputs YCbCr, the…

  • RE: ADV7181C LLC clock issues


     Have you crosscheck your i2c configuration with reference script available for CP XGA 1024x768.

     And also have you enabled 28MHz crystal by configuring 42 1D 47 and drive strength as high 42 F4 3F .





    what is the default llc clock frequency of ADV7181C, when the circuit is powered on and released from the reset.

    Thanks & Regards,