• ADV7125

    Hi all

    I'm using the ADV7125 to to run XGA 1024x768 video at 65MHz pixel clock.

    The design is based on the data sheet and EVM HDMI2RGB.

    The problem is that I keep getting green dots and blur all over the frame.

    What am I doing wrong?

  • ADV7125 inputs

    We are designing a board where the digital inputs to an ADV7125 (data, clock
    and control) are coming from a Xilinx FPGA. There will be a short time, while
    the FPGA is configuring, where the inputs to the ADV7125 will be floating. Do
  • ADV7125 with i.mx6

    Hi, I'm trying to combine i.mx6 and ADV7125 to get RS170 output

    I mean 24bit RGB data from i.mx6 will enter to ADV7125 input 

    But I'm not sure that ADV7125 can catch 24bit RGB data format(1024 x 768, from i.mx6) and source RS170 signal(640 x 480 format…

  • ADV7125 for RGB565

    Hello all,

            I am working on a video product in which our SoC is providing RGB565 as output and this input is fed to ADV7125 which generally takes RGB888 as input. 

    Whether RGB565 is supported to ADV7125. If yes then how? If no then any another video…

  • ADV7125 specific values

    Hello,

    I think that the min/max values not described by ADV7125 datasheet are not specified(assured).
    Instead my customer wants to know how the following specifications (described only Typ. value on page 4 and 6) are specified.
  • ADV7125 BLANK Pin

    Hello,

    I want to use ADV7125 Video DAC as Sync on Green RGB converter. For that, as per my understanding, I would have to route HSYNC and VSYNC via an XOR circuit to the SYNC pin of ADV7125. As most of the design I found are just pulling up the BLANK…

  • ADV7125 & AD724

    We want to implement a system with PAL video output or VGA monitor.

    1. For a PAL solution we want to use the ADV7125 for digital to analog conversion and the AD724 for analog to composite video. We saw in the datasheet of the AD724 (page…

  • ADV7125 Vref Value

    Hi everyone,

    I use the schematics in Datasheet (Figure 10. Typical Connection Diagram) on my design except AD1580 zener.

    I want to use adv7125 for composite video, so IOR and IOB terminated with 50ohm which is same impedance value with IOG. IOG is doubly…

  • Floating Inputs to ADV7125

    I’m designing a board where the digital inputs to an ADV7125 (data, clock and
    control) are coming from a Xilinx FPGA.

    There will be a short time, while the FPGA is configuring, where the inputs to
    the ADV7125 will be floating.
     
  • Vref in ADV7125

    Hi.

    If I use the AD1580 for reference voltage (Figure 10, pin 36 datasheet), what is the value of Vref in the formula?

    IOR, IOB (mA) = 7989.6 × Vref / Rset

    Vref is 1.235 V (internal reference voltage) or 1,225 V (provided by the AD1580)?


    regard…