• RE: ADV7611 Audio & Video Questions

    In CN-0282, connections are as follows:

    ADV7611 P23     ADV7125 B7

    ADV7611 P22     ADV7125 B6

    ADV7611 P21     ADV7125 B5

    ADV7611 P20     ADV7125 B4

    ADV7611 P19     ADV7125 B3

    ADV7611 P18     ADV7125 B2

    ADV7611 P17     ADV7125 B1

    ADV7611 P16     ADV7125 B0

    ADV7611 P15     ADV7125…

  • RE: ADV7343 - Input Clock Frequency

    Guenter,

    I have a plan use the ADV7125 to interface with ADV7611 instead ADV7343.

    Because ADV7343 Max. clock input frequency is 80MHz, but ADV7125 supports 170MHz as an industrial grade.

    Shall i use the single ended RGB video output data from ADV7125…

  • ADV7125

    Hi all

    I'm using the ADV7125 to to run XGA 1024x768 video at 65MHz pixel clock.

    The design is based on the data sheet and EVM HDMI2RGB.

    The problem is that I keep getting green dots and blur all over the frame.

    What am I doing wrong?

  • Floating Inputs to ADV7125

    I’m designing a board where the digital inputs to an ADV7125 (data, clock and
    control) are coming from a Xilinx FPGA.

    There will be a short time, while the FPGA is configuring, where the inputs to
    the ADV7125 will be floating.
     
  • ADV7125 inputs

    We are designing a board where the digital inputs to an ADV7125 (data, clock
    and control) are coming from a Xilinx FPGA. There will be a short time, while
    the FPGA is configuring, where the inputs to the ADV7125 will be floating. Do
  • RE: ADV7125 RS-343A Output Interface

    Hi,

      Please refer this link ADV7125 timing inquiry .

      Here you can find the schematic connection for adv7125.      

    Thanks,

    Poornima

  • ADV7125 frequency response plot

    Hi,

    I'd like to use the ADV7125 as for SDR, but I'm getting some unexpected loss at various frequencies.  Is there a frequency response plot for the ADV7125 (up to 150MHz)?

    Thanks,

    Ryan

  • RE: Video Encoder for 1080P@60?

    Have you looked at the ADV7125?

  • RE: CN-0282 mis-match the timing specification between ADV7611 and ADV7125

    Hi

    The data output from ADv7611 is done on the negative edge of clock. The data input to ADv7125 is done on the rising edge of clock.

    The min. for setup time for Adv7125 is specified as 0.5 ns for VAA = 5V timing and 0.2 ns for VAA =3V3 timing.

    So…