• ADuC7128 DAC


    I'm trying to familiarise myself with the DAC of the ADuC7128 (I have the eval. board Rev. 01). What I've done is to test the output of the DAC, trying both the single-ended mode and the differential mode. From what I understand (from reading the…

  • ad7264 and aduc7128 connection problem

    Hi ALL

    I want connect ad7264 (in software mode via spi) to aduc7128. But I found problems

    1. SPI module in aduc7128 work transmite only 8/16/24/32 bits . But ad7264 required 33 /47 bits.

    2. If i write software spi, it made slow...

    Plz help

  • RE: ADuC7128/29 UARTs ?

    The best place to understand this is in my opinion

         table 76 on page 57 of the datasheet REV.0.

    The ADuC7128 is in a 64-pin package and the ADuC7129 is in a 80-pin package.

    There is a small fault in that table - P2.0 is available also on the 64-pin…

  • Max. Frequency of the ADuC7128/29 DDS

    What is the max. output frequency from the on-chip DDS of the ADuC7128/29 ?

  • ADuC7128/7129 Code execution / Flash programming

    Can Code be executed during Flash programming on the ADuC7128/7129 ?

  • Aduc7128/7129 PLM_COMP, PLMIN and PLMOUT Signals

    Does anyone know the meaning of the PLM_COMP, PLMIN, and PLMOUT signals in table 70 of the ADUC7128 / 7129 datasheet?
    Thank you!

  • DDS on AduC7128/29


    I've a question on AduC7128/29:

    In the datasheet on page 47 the DDS is explained. I can control the frequenz via the DDSFRQ MMR.

    This is ok. I can also contol the phase offset via the DDSPHS MMR, but what phase offset in relation to what…

  • RE: Eval Kit ADuC7128

    You may try also emIDE which supports JLINK (mida-Link) out of the box. You can use the IAR ddf-files also with it.

  • ADuc7128 evaluation JTAG issue

    When I reach step 6c in the ADuC7128 GetStarted Guide (REV0.1) and attempt to setup the provided mIDAS-Link emulator, I get the following errors as popup dialogs after selecting the mIDASLinkRDI.dll:

    1) mIDAS-Link RDI Error: Firmware update requires…