The XCKLI should be connected to GND if not used.
The ADCBUSY enable bit in ADCCON is ignored on all ADuC702x devices, ADuC7019 to ADuC7029, including the ADuC7023.
Another option is ADuC70xx series parts that contain a 12bit SAR ADC, 2.5V internal reference and ARM 7 Core. ADuC7019/7020 is recommended.
The ADuC7019/20/21/22/24/25/26/27/28/29 datasheet shows how to route the PWM0H output to an external pin on the ADuC7020 using the PLA.
But, this doesn't work for the ADuC7021. Is there another way?
On the following parts, the exposed paddle is used for mechanical stability and should be connected to a large pad on your PCB but, this pad should not be connected to ground or any other track:
ADuC7019, ADuC7020, ADuC7021, ADuC7022, ADuC7023, ADuC7024…
ADUC7019/20 Rev. C Page 69 datasheet points out that spi speed limit is 3.48 Mb in master mode with CD =0 and SPIDIV = 5.
What is this limit?
What will happen if I set SPIDIV = 4?
I need higher speed.
Because the ADuC7019/20/21/22/24/25/26/27/28/29 and ADuC7128/7129 parts have a Glitch immunity filter on their reset input circuitry, the minimum pulse width of an external reset signal should be 120uS to safely reset the part.
Note, the ADuC7023/ADuC7060…
I have an ADuC7023. Is it possible to download the program to the uC not "through" debugger ??
I checked the compatibility of ULINK 2 from KEIL, and as can be seen below ADuC7023 is not on that list. That is why I was wondering if…